PCF8531U NXP [NXP Semiconductors], PCF8531U Datasheet - Page 18

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PCF8531U

Manufacturer Part Number
PCF8531U
Description
34 x 128 pixel matrix driver
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
PCF8531_4
Product data sheet
Fig 8.
Fig 9.
Fig 10. Sequence of writing data bytes into RAM with horizontal addressing (V = 0)
RAM format and addressing
Sequence of writing data bytes into RAM with vertical addressing (V = 1)
MSB
MSB
MSB
LSB
LSB
LSB
128
256
384
512
0
1
2
3
4
0
0
0
0
0
row. After the very last address (X = 127 and Y = 4), the address pointers wrap around to
address (X = 0 and Y = 0). The Y address 5 is reserved for icon data and is not affected
by the addressing mode. Please note that in bank 4 only the LSB (DB0) of the data is
written into the RAM and in bank 5 only the 5th data bit (DB4) is written into the RAM.
129
257
385
513
5
6
1
1
1
130
258
386
514
2
0
X address
X address
Rev. 04 — 13 June 2008
icon data
icon data
X address
icon data
127
638
639
127
127
255
383
511
639
127
34 x 128 pixel matrix driver
0
1
2
3
4
5
0
1
2
3
4
5
Y address
Y address
mgs470
mgs471
PCF8531
0
1
2
3
4
5
© NXP B.V. 2008. All rights reserved.
Y address
mgs469
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