CY7C68300C CYPRESS [Cypress Semiconductor], CY7C68300C Datasheet - Page 10

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CY7C68300C

Manufacturer Part Number
CY7C68300C
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet

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Document 001-05809 Rev. *A
Table 1. AT2LP Pin Descriptions
TQFP
70
100
68
69
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
[3]
QFN
36
36
13
54
N/A
N/A
N/A
N/A
N/A
Note: (Italic pin names denote pin functionality during CY7C68300A compatibility mode)
56
34
35
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
[3]
[3]
[3]
[3]
SSOP
N/A
N/A
N/A
N/A
N/A
N/A
56
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
1
2
3
4
(VBUS_PWR_VALID)
VBUS_ATA_ENABLE
DRVPWRVLD
Pin Name
ARESET#
(ATA_EN)
RESET#
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
(DA2)
DD10
DD12
DD13
DD14
DD15
CS0#
CS1#
DD11
GND
GND
GND
GND
DA0
DA1
DA2
DD8
DD9
V
V
NC
NC
CC
CC
O/Z
O/Z
O/Z
O/Z
O/Z
O/Z
PWR
PWR
Type
GND
GND
GND
IO
IO
IO
IO
IO
IO
IO
IO
IO
Pin
NC
NC
I
I
I
[1]
[1]
[1]
[1]
[3]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
Default State
Driven HIGH
Driven HIGH
Driven HIGH
Driven HIGH
Driven HIGH
at Startup
after 2 ms
after 2 ms
after 2 ms
after 2 ms
after 2 ms
delay
delay
delay
delay
delay
Input
Input
Input
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
ATA address.
ATA address.
Device presence detect. (See
page
EEPROM address 0x08. This pin must be pulled HIGH
if functionality is not utilized.
Alternate function. Input when the EEPROM configu-
ration byte 8 has bit 7 set to one. The input value is
reported through EP1IN (byte 0, bit 0).
ATA chip select.
ATA chip select.
ATA address.
ATA reset.
Ground.
No connect.
Chip reset (See
V
VBUS detection (See
page
ATA data bit 8.
ATA data bit 9.
ATA data bit 10.
ATA data bit 11.
Ground.
V
No connect.
General purpose IO pins (See
page
functionality is not used.
Ground.
ATA data bit 12.
ATA data bit 13.
ATA data bit 14.
ATA data bit 15.
Ground.
CC
CC
. Connect to 3.3V power source.
. Connect to 3.3V power source.
13). Configurable logical polarity is controlled by
14).
13). The GPIO pins must be tied to GND if
CY7C68300C/CY7C68301C
CY7C68320C/CY7C68321C
“RESET#” on page
Pin Description
“VBUS_ATA_ENABLE” on
(continued)
“DRVPWRVLD” on
“GPIO Pins” on
14).
Page 10 of 42
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