CY7C68300C CYPRESS [Cypress Semiconductor], CY7C68300C Datasheet
CY7C68300C
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CY7C68300C Summary of contents
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... Features (CY7C68300C/CY7C68301C only) • Pin-compatible with CY7C68300A (using Backward Compatibility mode) • 56-pin SSOP and 56-pin QFN lead-free packages • CY7C68301C is ideal for battery-powered designs • CY7C68300C is ideal for self- and bus-powered designs Bus Master Misc control signals and GPIO ...
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... The device initialization process is configurable, enabling the AT2LP to initialize ATA/ATAPI devices without software inter- vention. CY7C68300A Compatibility As mentioned above, the CY7C68300C/301C contains a backward compatibility mode that allows used in existing EZ-USB AT2 (CY7C68300A) designs. The backward compatibility mode is enabled by programming the EEPROM with the CY7C68300A signature ...
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... The AT2LP is available in different package types to meet a variety of design needs. The CY7C68320C/321C is available in 56-pin QFN and 100-pin TQFP packages to provide the greatest flexibility for new designs. The CY7C68300C/301C is available in 56-pin SSOP and QFN package types to ensure backward compatibility with CY7C68300A designs. ...
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... Figure 3. 56-pin QFN Pinout (CY7C68300C/CY7C68301C) IORDY 1 DMARQ 2 AVCC 3 XTALOUT 4 XTALIN 5 AGND 6 VCC 7 DPLUS 8 DMINUS 9 GND 10 VCC 11 GND 12 NOTE: Italic labels denote pin functionality (PU10K) PWR500# 13 GND 14 Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C EZ-USB AT2LP CY7C68300C CY7C68301C 56-pin QFN during CY7C68300A compatibility mode. ...
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... VCC 18 GND 19 GPIO1 20 GND 21 SCL 22 SDA 23 VCC 24 DD0 25 DD1 26 DD2 27 DD3 28 Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C DD12 DD11 DD10 DD9 DD8 VBUS_ATA_ENABLE VCC RESET# GND ARESET# DA2 CS1# CS0# GPIO0 DA1 EZ-USB AT2LP DA0 CY7C68320C INTRQ CY7C68321C VCC 56-pin SSOP DMACK# ...
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... Figure 5. 56-pin QFN Pinout (CY7C68320C/CY7C68321C) IORDY 1 DMARQ 2 AVCC 3 XTALOUT 4 XTALIN 5 AGND 6 VCC 7 DPLUS 8 DMINUS 9 GND 10 VCC 11 GND 12 GPIO1 13 GND 14 Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C EZ-USB AT2LP CY7C68320C CY7C68321C 56-pin QFN 42 RESET# 41 GND 40 ARESET# 39 DA2 38 CS1# 37 CS0# 36 GPIO0 35 DA1 34 DA0 33 INTRQ 32 VCC 31 DMACK# ...
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... NC 15 VCC 16 DPLUS 17 DMINUS 18 GND 19 VCC 20 GND 21 SYSIRQ 22 GND 23 GND 24 GND 25 PWR500# 26 GND SCL 29 SDA 30 Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C VBUS_ATA_ENABLE EZ-USB AT2LP C CY7C68320A C CY7C68321A 100-pin TQFP DD8 80 79 VCC 78 RESET GND 75 ARESET# 74 DA2 73 CS1# 72 CS0# 71 DRVPWRVLD 70 DA1 69 DA0 ...
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... A ‘#’ sign after the pin name indicates that it is active LOW. Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C 68300C/01C and 68320C/321C pinouts for the 56-pin packages. For information on the CY7C68300A pinout, refer to the CY7C68300A data sheet that is found in the ’EZ-USB AT2’ ...
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... N/A N/A VBUSPWRD 63 N/A N N/A N/A GND INTRQ Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Pin Default State Type at Startup 2 IO Data signal for I C interface. (See page 11). Apply a 2.2k pull up resistor. No connect. PWR V . Connect to 3.3V power source. CC [1] IO Hi-Z ATA data bit 0. [1] IO Hi-Z ATA data bit 1 ...
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... GND DD12 DD13 DD14 DD15 GND Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Pin Default State Type at Startup [1] O/Z Driven HIGH ATA address. after 2 ms delay [1] O/Z Driven HIGH ATA address. after 2 ms delay I Input Device presence detect. (See page 13) ...
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... The clock and data pins for the I C port must be connected to the configuration EEPROM and to 2.2K pull up resistors tied EEPROM is used in the design, the SCL and SDA CC Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Pin Default State Type at Startup IO Bus-powered ATA pull up voltage source (see “ ...
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... Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C inputs or outputs, with byte 0x09 of the configuration data. The state of any GPIO pin that is not set as an input is reported as ‘0’ in the EP1 data. Table 3 gives the bitmap for the data returned on the interrupt ...
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... Otherwise, the ATA bus is driven by the AT2LP to a default inactive state whenever VBUS_ATA_ENABLE is not asserted. Design practices for signal integrity as outlined in the ATA/ATAPI-6 specification must be followed with systems that utilize a ribbon cable interconnect between the AT2LP’s ATA CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C No SYSIRQ=1? Yes Latch State of IO Pins ...
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... FX2™/AT2™/SX2™ Reset and Power Considerations, at www.cypress.com, for more information. While the AT2LP is in reset, all pins are held at their default startup state. Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C PWR500# The AT2LP asserts PWR500# to indicate that VBUS current may be drawn up to the limit specified by the bMaxPower field of the USB configuration descriptors ...
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... ATA Command Blocks. All other fields of the CBW and restrictions on the CBWCB remain as defined in the USB Mass Storage Class Bulk-Only Transport Specification. The ATACB 15. Refer to the USB must be 16 bytes in length. The following table and text defines the fields of the ATACB. CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C USB Interrupt Data Byte ...
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... Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Field Description This field indicates to the CY7C68300C/CY7C68301C that the ATACB contains a vendor-specific command block. This value of this field must match the value in EEPROM address 0x04 for the command to be recognized as a vendor-specific ATACB command. This field must be set to 0x24 for ATACB commands. ...
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... Reserved Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Field Description This field controls which of the taskfile register read or write accesses occur. Taskfile read data is always 8 bytes in length, and unselected register data are returned as 0x00. Register accesses occur in sequential order as outlined ...
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... Document 001-05809 Rev not a valid mode of operation if no factory programming has been done. • EEPROM signature of 0x4D4D is found, the CY7C68300C/CY7C68301C uses the same pinout and 2 C bus EEPROM format as the CY7C68300A (EZ-USB AT2+). • EEPROM signature of 0x534B is found, the AT2LP uses the values stored in the EEPROM to configure the USB descriptors for normal operation ...
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... Reserved (0) 14 (0Eh) Reserved (0) 15–30 (0Fh1Eh) Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C ATAPI command for EEPROM accesses (CfgCB) and one for board level testing (MfgCB), as described in the following sections. There is a convenient method available for starting the AT2LP in Board Manufacturing Test Mode to allow reprogramming of EEPROMs without a mass storage device attached ...
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... ATAPI data packet associated with this request. (See for an explanation of the required Mfg_load data format.) Any data length can be specified, but only bytes 0 through 3 are mapped to pins length of 4 bytes is recommended. To exit Manufacturing Test Mode, a hard reset (toggle RESET#) is required. Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C ...
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... The ‘AT2LP Blaster’ tool in the CY4615C kit can be used to edit and program these values into an AT2LP-based product (refer to Figure 11). The ‘AT2LP Primer’ tool can be used to Figure 11. Snapshot of ‘AT2LP Blaster’ Utility Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C program AT2LP-based environment and provides for serial number randomization See “ ...
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... Bit 3 Enable a delay 120 ms at each read of the DRQ bit where the device data length does not match the host data length. This allows the CY7C68300C/CY7C68301C to work with most devices that incorrectly clear the BUSY bit before a valid status is present. ...
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... ATAPI UDMA Enable UDMA Modes 0x07 Reserved Multi-word DMA mode PIO Modes Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration Item Description Bit 1 Determines if the AT2LP SRST reset during drive initialization. At least one reset must be enabled. Do not set SRST to 0 and Skip Pin Reset the same time. ...
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... Drive Power Valid Polarity Drive Power Valid Enable 0x09 Reserved General Purpose IO Pin Output Enable Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration Item Description Bit 7 Button mode (100-pin package only). Sets ATAPUEN, PWR500# and DRVPWRVLD to become button inputs returned on bits 2, 1, and 0 of EP1IN. This bit must be set to ‘ ...
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... Search ATA on VBUS 0x0F Reserved Device Descriptor 0x10 bLength 0x11 bDescriptor Type Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration Item Description Bits 7:6 Reserved. Must be set to zero. Bits 5:0 These bits select the value driven on the GPIO pins that are configured as outputs in configuration address 0x09. ...
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... Value Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration Item Description USB Specification release number in BCD Device class Device subclass Device protocol USB packet size supported for default pipe Vendor ID. Cypress’ Vendor ID may only be used for evalu- ation purposes, and not in released products ...
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... Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration Item Description Index to the configuration string. This entry must equal half of the address value where the string starts, or 0x00 if the string does not exist. Device attributes for this configuration Bit 7 Reserved ...
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... Input Report 0x6F Usage 0x70 0x71 Logical_Minimum 0x72 0x73 Logical_Maximum 0x74 Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration Item Description Alternate setting Number of endpoints used by this interface Class code Sub class Sub Sub class Index of string descriptor Length of this descriptor in bytes Endpoint descriptor type ...
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... Channel Descriptor 0x91 bLength 0x92 bDescriptorType 0x93 bChannelID 0x94 bmAttributes Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration Item Description 8 bits 2 fields Input (Data, Variable, Absolute) Usage - vendor defined Logical Minimum (–128) Logical Maximum (127) Report Size 8 bits Report Count 2 fields ...
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... Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration Item Description Identifier of the target recipient If Recipient type field of bmAttributes = 1 then bRecipient field is the bInterfaceNumber If Recipient type field of bmAttributes = 2 then bRecipient field is an endpoint address, where: D7: Direction (0 = Out IN) D6 ...
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... Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration Item Description Unicode character LSB Unicode character MSB Unicode character LSB Unicode character MSB Unicode character LSB Unicode character MSB Unicode character LSB Unicode character MSB ...
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... fixed length (24 bytes). Changing this string may cause CD authoring software to incorrectly identify the device.) 0Xxx Device name byte 1 0Xxx Device name byte 2 0Xxx Device name byte 3 Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration Item Description Unicode character LSB Unicode character MSB Unicode character LSB Unicode character MSB ...
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... Vendor-specific USB commands allow the AT2LP to address up to 256 bytes of EEPROM data. LOAD_CONFIG_DATA This request enables writes to the AT2LP’s configuration data space. The wIndex field specifies the starting address and the wLength field denotes the data length in bytes. Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Configuration Item Description ASCII Character ...
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... C memory device Illegal values for wValue result in an undefined operation. Attempted reads from an I result in an undefined operation. Attempts to read configuration bytes with starting addresses greater than 0xF also, result in an undefined operation. Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C wValue wIndex 0x01 0x0000 30x02 – ...
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... IN I Suspend Current SUSP CY7C68300C/CY7C68320C Suspend Current CY7C68301C/CY7C68321C I Supply Current CC I Unconfigured Current UNCONFIG T Reset Time After Valid Power RESET Pin Reset After Power Up Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C Conditions Min. 3.00 200 –0.5 0 < V < –0 2.4 OUT I = –4 mA OUT ...
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... EZ-USB AT2LP Reference Design Kit Note 4. The General Purpose inputs can be enabled on ATAPUEN, PWR500#, and DRVPWRVLD with EEPROM byte 8, bit 7 on CY7C68320C/CY7C68321C. Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C in the AT2LP configuration space and the data reported by the drives in response to an IDENTIFY DEVICE command. ...
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... R 0.08 MIN. 0° MIN. 0.20 MAX. 0.25 GAUGE PLANE R 0.08 MIN. 0°-7° 0.20 MAX. 0.60±0.15 0.20 MIN. 1.00 REF. DETAIL Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C 16.00±0.20 14.00±0. 0.30±0.08 0.65 TYP SEATING PLANE STAND-OFF 0.05 MIN. NOTE: 0.15 MAX. 1. JEDEC STD REF MS-026 2. BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0 ...
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... Package Diagrams (continued) Figure 13. 56-lead Shrunk Small Outline Package 056 28 29 0.720 0.730 0.088 0.092 0.025 BSC Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C .020 1 0.395 0.420 0.292 DIMENSIONS IN INCHES MIN. 0.299 56 SEATING PLANE 0.095 .010 0.110 GAUGE PLANE 0.110 0°-8° 0.008 ...
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... Minimize reflected signals by avoiding using stubs and vias. • Connect the USB connector shell and signal ground as near to the USB connector as possible. • Use bypass/flyback capacitors on VBUS near the connector. Document 001-05809 Rev. *A CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C SIDE VIEW 1.00[0.039] MAX. 0.08[0.003] C ...
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... Proper Power Up Sequence Power must be applied to the CY7C68300C/CY7C68301C before the same time as the ATA/ATAPI device. If power is supplied to the drive first, the CY7C68300C/CY7C68301C startup in an undefined state. Designs that utilize separate power supplies for the CY7C68300C/CY7C68301C and the ATA/ATAPI device are not recommended. ...
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... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CY7C68300C/CY7C68301C CY7C68320C/CY7C68321C drives have large enough buffers to handle the flow of data to and from it ...
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... Document History Paged Description Title: CY7C68300C/CY7C68301C/CY7C68320C/CY7C68321C EZ-USB AT2LP™ USB 2.0 to ATA/ATAPI Bridge Document Number: 001-05809 REV. ECN NO. Issue Date ** 409321 See ECN *A 611658 See ECN Document 001-05809 Rev. *A Orig. of Description of Change Change GIR New data sheet. ARI/KKU Implemented new template. Added part number CY7C68320C-56PVXC to the Ordering Information ...