PCA2125TS NXP [NXP Semiconductors], PCA2125TS Datasheet - Page 5

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PCA2125TS

Manufacturer Part Number
PCA2125TS
Description
SPI Real-time clock/calendar
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
[2]
PCA2125_1
Product data sheet
Ten’s place in 24 h mode.
8.2 Reset
The PCA2125 includes an internal reset circuit which is active whenever the oscillator is
stopped; see
the oscillator pins OSCI or OSCO to ground.
The oscillator is considered to be stopped during the time between power-up and stable
crystal resonance; see
on crystal type, temperature and supply voltage. Whenever an internal reset occurs, the
reset flag bit RF is set.
Table 5.
Bits labeled ‘-’ are not implemented and will return a ‘0’ when read. Bits labeled ‘X’ are undefined at
power-up and unchanged by subsequent resets.
Address
00h
01h
02h
03h
04h
05h
06h
Fig 3.
Fig 4.
oscillation
Reset system
Power-on reset
internal
Register reset value
reset
Register name
Control_1
Control_2
Seconds
Minutes
Hours
Days
Weekdays
V
DD
Figure
3. The oscillator can be stopped, for example, by connecting one of
OSCILLATOR
SDI
CE
Figure
Rev. 01 — 28 July 2008
POR_OVRD
OVERRIDE
CLEAR
4. This time can be in the range 200 ms to 2 s depending
chip in reset
POR
Bit
0 = stopped, 1 = running
7
0
0
1
-
-
-
-
osc stopped
0 = override inactive
1 = override active
0 = clear override mode
1 = override possible
X
X
6
0
0
-
-
-
X
X
X
X
5
0
0
-
X
X
X
X
4
0
-
-
Bit
SPI Real-time clock/calendar
chip not in reset
001aaf898
X
X
X
X
3
1
0
-
reset
PCA2125
X
X
X
X
X
2
0
0
© NXP B.V. 2008. All rights reserved.
001aaf897
X
X
X
X
X
1
0
-
t
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X
X
X
X
X
0
0
-

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