M29W800DT NUMONYX [Numonyx B.V], M29W800DT Datasheet
M29W800DT
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M29W800DT Summary of contents
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... Low power consumption – Standby and automatic standby 100,000 program/erase cycles per block Electronic signature – Manufacturer code: 0020h – Top device code M29W800DT: 22D7h – Bottom device code M29W800DB: 225Bh March 2008 8-Mbit (1 Mbit 512 Kbits x 16, boot block) Rev 10 ...
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... SS 3 Bus operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.1 Bus read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.2 Bus write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.3 Output disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.4 Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.5 Automatic standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.6 Special bus operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.6.1 3.6.2 4 Command interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.1 Read/Reset command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.2 Auto Select command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.3 Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.4 Unlock Bypass command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.5 Unlock Bypass Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2/52 Electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Block protection and blocks unprotection . . . . . . . . . . . . . . . . . . . . . . . 16 M29W800DT, M29W800DB ...
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... M29W800DT, M29W800DB 4.6 Unlock Bypass Reset command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.7 Chip Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.8 Block Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.9 Erase Suspend command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.10 Erase Resume command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.11 Read CFI Query command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.12 Block Protect and Chip Unprotect commands . . . . . . . . . . . . . . . . . . . . . 20 5 Status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.1 Data polling bit (DQ7 5.2 Toggle bit (DQ6 5.3 Error bit (DQ5 ...
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... TSOP48 – 48 lead plastic thin small outline mm, package mechanical data . . . . 36 Table 18. TFBGA48 – active ball array – 0.80 mm pitch, package mechanical data. 37 Table 19. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 20. Top boot block addresses, M29W800DT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Table 21. Bottom boot block addresses, M29W800DB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 22. Query structure overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Table 23. ...
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... M29W800DT, M29W800DB List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. SO connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. TSOP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. TFBGA connections (top view through package Figure 5. Block addresses ( Figure 6. Block addresses (x 16 Figure 7. Data polling flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 8. Data toggle flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 9. AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 10. ...
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... The memory is supplied with all the bits erased (set to ’1’). Figure 1. Logic diagram 6/52 16). The first or last 64 Kbytes have been divided into four A0-A18 W M29W800DT E M29W800DB G RP BYTE V SS M29W800DT, M29W800DB Figure 5: Block addresses (x 8) DQ0-DQ14 DQ15A–1 RB AI05470B ...
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... M29W800DT, M29W800DB Table 1. Signal names Signal A0-A18 DQ0-DQ7 DQ8-DQ14 DQ15A– BYTE Figure 2. SO connections Description Address inputs Data inputs/outputs Data inputs/outputs Data input/output or address input Chip enable Output enable Write enable Reset/block temporary unprotect Ready/busy output (not available on SO44 package) ...
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... A10 M29W800DT M29W800DB A18 A17 AI05461 M29W800DT, M29W800DB A16 BYTE V SS DQ15A–1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 V CC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 ...
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... M29W800DT, M29W800DB Figure 4. TFBGA connections (top view through package A17 A18 DQ0 DQ2 DQ5 DQ12 E DQ8 DQ10 G DQ9 DQ11 DQ1 DQ3 DQ4 Description A13 A8 A12 ...
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... EFFFFh E0000h 1FFFFh 10000h 0FFFFh 08000h 07FFFh Total Kbyte blocks 06000h 05FFFh 04000h 03FFFh 00000h table, Table 20 and Table 21 for a full listing of the block addresses. M29W800DT, M29W800DB M29W800DB 64 Kbyte 64 Kbyte Total Kbyte blocks 64 Kbyte 32 Kbyte 8 Kbyte 8 Kbyte 16 Kbyte AI05463 ...
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... M29W800DT, M29W800DB Figure 6. Block addresses (x 16) M29W800DT Top boot block addresses (x 16) 7FFFFh 8 Kword 7E000h 7DFFFh 4 Kword 7D000h 7CFFFh 4 Kword 7C000h 7BFFFh 16 Kword 78000h 77FFFh 32 Kword 70000h 0FFFFh 32 Kword 08000h 07FFFh 32 Kword 00000h 1. Also see Appendix A: Block address Bottom boot block addresses (x 16) ...
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... DQ8-DQ14). When IH , this pin behaves as an address pin; DQ15A–1 Low will select the LSB of , all other pins are ignored. IH M29W800DT, M29W800DB for a brief overview of the signals , these pins are not used and are IL ...
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... M29W800DT, M29W800DB 2.7 Write enable (W) The write enable, W, controls the bus write operation of the memory’s command interface. 2.8 Reset/block temporary unprotect (RP) The reset/block temporary unprotect pin can be used to apply a hardware reset to the memory or to temporarily unprotect all blocks that have been protected. ...
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... The PCB track widths must be sufficient to carry the currents required during program and erase operations, I 2.12 V ground SS The V ground is the reference for all voltage measurements. SS 14/52 M29W800DT, M29W800DB supply voltage pin and the CC3 ...
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... M29W800DT, M29W800DB 3 Bus operations There are five standard bus operations that control the device. These are bus read, bus write, output disable, standby and automatic standby. See operations, for a summary. Typically glitches of less than Chip Enable or Write Enable are ignored by the memory and do not affect bus operations. ...
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... others M29W800DT, M29W800DB ID Data inputs/outputs DQ14-DQ8 DQ7-DQ0 Hi-Z Data output Hi-Z Data input Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z 20h IH D7h (M29W800DT) Hi-Z 5Bh (M29W800DB) IH Data inputs/outputs DQ15A–1, DQ14-DQ0 Data output Data input Hi-Z Hi 0020h 22D7h (M29W800DT 225Bh (M29W800DB Table 2 ...
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... Table 4, or Table 5, depending on the configuration that is being . The other address bits may be set to either the addressed block is protected then 01h is output on data IL IH Command interface and The device code for the M29W800DT is . The IH . The IL 17/52 ...
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... The Unlock Bypass Reset command can be used to return to read/reset mode from unlock bypass mode. Two bus write operations are required to issue the Unlock Bypass Reset command. Read/Reset command does not exit from unlock bypass mode. 18/52 for more details. M29W800DT, M29W800DB cycles. Bus read operations ...
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... M29W800DT, M29W800DB 4.7 Chip Erase command The Chip Erase command can be used to erase the entire chip. Six bus write operations are required to issue the Chip Erase command and start the program/erase controller. If any blocks are protected then these are ignored and all the other blocks are erased. If all of the blocks are protected the chip erase operation appears to start but will terminate within about 100 µ ...
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... Each block can be separately protected against accidental program or erase. The whole chip can be unprotected to allow the data inside the blocks to be changed. Block protect and chip unprotect operations are described in 20/52 (CFI), Table for details on the information contained in the common flash interface M29W800DT, M29W800DB 22, Table 23, Table 24, Table ...
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... M29W800DT, M29W800DB Table 4. Commands, 16-bit mode, BYTE = V Command Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data 1 Read/Reset 3 555 Auto Select 3 555 Program 4 555 Unlock Bypass 3 555 Unlock Bypass Program 2 Unlock Bypass Reset 2 Chip Erase 6 555 Block Erase ...
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... AAA A0 AA 555 55 AAA 555 55 AAA 80 AA 555 55 AAA DQ15 when BYTE Min. 100,000 20 M29W800DT, M29W800DB 4th 5th PA PD AAA AA 555 55 AAA AAA AA 555 (1)(2) (2) Typ. Max. ( (4) 0 (3) 10 200 ...
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... M29W800DT, M29W800DB 5 Status register Bus read operations from any address always read the status register during program and erase operations also read during erase suspend when an address within a block being erased is accessed. The bits in the status register are summarized in 5.1 Data polling bit (DQ7) The data polling bit can be used to identify whether the program/erase controller has successfully completed its operation has responded to an erase suspend ...
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... The alternative toggle bit changes from ’0’ to ’1’ to ’0’, etc. with successive bus read operations from addresses within blocks that have not erased correctly. The alternative toggle bit does not change if the addressed block has erased correctly. 24/52 M29W800DT, M29W800DB ...
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... M29W800DT, M29W800DB Table 7. Status register bits Operation Address Program Any address Program during erase Any address suspend Program error Any address Chip erase Any address Erasing block Block erase before timeout Non-erasing block Erasing block Block erase Non-erasing block Erasing block ...
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... Status register Figure 8. Data toggle flowchart 26/52 START READ DQ6 READ DQ5 & DQ6 DQ6 NO = TOGGLE YES NO DQ5 = 1 YES READ DQ6 TWICE DQ6 NO = TOGGLE YES FAIL PASS AI01370C M29W800DT, M29W800DB ...
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... M29W800DT, M29W800DB 6 Maximum rating Stressing the device above the rating listed in the cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied ...
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... Input pulse voltages Input and output timing ref. voltages Figure 9. AC measurement I/O waveform 28/52 conditions. Designers should check that the 45 ns Min 3.0 – M29W800DT, M29W800DB M29W800D Max Min Max Min Max 3.6 2.7 3.6 2.7 85 –40 85 – ...
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... M29W800DT, M29W800DB Figure 10. AC measurement load circuit Table 10. Device capacitance Symbol C Input capacitance IN C Output capacitance OUT 1. Sampled only, not 100% tested. Table 11. DC characteristics Symbol I Input leakage current LI I Output leakage current LO I Supply current (read) CC1 I Supply current (standby) ...
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... Sampled only, not 100% tested. 30/52 tAVAV VALID tAVQV tELQV tELQX tGLQX tGLQV tBHQV Parameter Test condition M29W800DT, M29W800DB tEHQZ tGHQX tGHQZ VALID tBLQZ M29W800D Min Max 45 70 ...
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... M29W800DT, M29W800DB Figure 12. Write AC waveforms, write enable controlled A0-A18/ A– DQ0-DQ7/ DQ8-DQ15 V CC tVCHEL RB Table 13. Write AC characteristics, write enable controlled Symbol Alt t t Address Valid to Next Address Valid AVAV Chip Enable Low to Write Enable Low ELWL Write Enable Low to Write Enable High ...
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... EHRL BUSY High to Write Enable Low VCHWL VCS CC 1. Sampled only, not 100% tested. 32/52 tAVAV VALID tAVEL tWLEL tGHEL tELEH tDVEH Parameter M29W800DT, M29W800DB tELAX tEHWH tEHGL tEHEL tEHDX VALID tEHRL M29W800D Min 45 70 Min 0 0 Min 30 45 ...
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... M29W800DT, M29W800DB Figure 14. Reset/block temporary unprotect AC waveforms tPLPX RP Table 15. Reset/block temporary unprotect AC characteristics Symbol Alt (1) t PHWL RP High to Write Enable Low, Chip Enable t t PHEL RH Low, Output Enable Low (1) t PHGL (1) t RHWL RB High to Write Enable Low, Chip Enable ...
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... JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. Figure 15. SO44 – 44 lead plastic small outline, 525 mils body width, package outline Drawing is not to scale. 34/ M29W800DT, M29W800DB SO-d ...
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... M29W800DT, M29W800DB Table 16. SO44 – 44 lead plastic small outline, 525 mils body width, package mechanical data Symbol Typ 2.30 b 0. 28.20 E 13.30 EH 16.00 e 1. millimeters Min Max 2.80 0.10 2.20 2.40 0.35 0.50 0.10 0.20 0.08 28.00 28.40 13.20 13.50 15.75 16.25 – – 8° 44 Package mechanical data inches Typ Min 0.004 0.091 0.087 0.016 0.014 ...
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... millimeters Min Max 1.20 0.05 0.15 0.95 1.05 0.17 0.27 0.10 0.21 0.08 11.90 12.10 19.80 20.20 18.30 18.50 – – 0.50 0.70 0° 5° M29W800DT, M29W800DB inches Typ Min 0.004 0.002 0.039 0.037 0.009 0.007 0.004 0.472 0.468 0.787 0.779 0.724 0.720 0.020 – 0.024 0.020 0.031 3° 0° A TSOP-G Max 0.047 ...
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... M29W800DT, M29W800DB Figure 17. TFBGA48 – ball array – 0.80 mm pitch, bottom view package outline FD FE BALL "A1" Drawing is not to scale. Table 18. TFBGA48 – active ball array – 0.80 mm pitch, package mechanical data Symbol Typ A A1 ...
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... Option T = tape & reel packing E = lead-free package, standard packing F = lead-free package, tape & reel packing Note: For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest Numonyx Sales Office. 38/52 M29W800DT, M29W800DB M29W800DB ...
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... M29W800DT, M29W800DB Appendix A Block address table Table 20. Top boot block addresses, M29W800DT # Size (Kbytes Address range (x 8) FC000h-FFFFFh FA000h-FBFFFh F8000h-F9FFFh F0000h-F7FFFh E0000h-EFFFFh ...
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... F0000h-FFFFFh E0000h-EFFFFh D0000h-DFFFFh C0000h-CFFFFh B0000h-BFFFFh A0000h-AFFFFh 90000h-9FFFFh 80000h-8FFFFh 70000h-7FFFFh 60000h-6FFFFh 50000h-5FFFFh 40000h-4FFFFh 30000h-3FFFFh 20000h-2FFFFh 10000h-1FFFFh 08000h-0FFFFh 06000h-07FFFh 04000h-05FFFh 00000h-03FFFh M29W800DT, M29W800DB Address range (x 16) 78000h-7FFFFh 70000h-77FFFh 68000h-6FFFFh 60000h-67FFFh 58000h-5FFFFh 50000h-57FFFh 48000h-4FFFFh 40000h-47FFFh 38000h-3FFFFh 30000h-37FFFh 28000h-2FFFFh 20000h-27FFFh 18000h-1FFFFh 10000h-17FFFh 08000h-0FFFFh 04000h-07FFFh 03000h-03FFFh ...
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... M29W800DT, M29W800DB Appendix B Common flash interface (CFI) The common flash interface is a JEDEC approved, standardized data structure that can be read from the flash memory device. It allows a system software to query the device to determine various electrical and timing parameters, density information and functions supported by the memory ...
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... Typical timeout per individual block erase = 2 0000h Typical timeout for full chip erase = 2 0004h Maximum timeout for byte/word program = 2 0000h Maximum timeout for write buffer program = 2 0003h Maximum timeout per individual block erase = 2 0000h Maximum timeout for chip erase = 2 M29W800DT, M29W800DB Description n µ ( ...
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... M29W800DT, M29W800DB Table 25. Device geometry definition Address 27h 4Eh 28h 50h 29h 52h 2Ah 54h 2Bh 56h 2Ch 58h 2Dh 5Ah 2Eh 5Ch 2Fh 5Eh 30h 60h 31h 62h 32h 64h 33h 66h 34h 68h 35h 6Ah 36h 6Ch ...
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... Simultaneous operations not supported 0000h Burst mode not supported supported Page mode not supported page word 0000h page word Data XXXX XXXX 64-bit: unique device number XXXX XXXX M29W800DT, M29W800DB Value ‘P’ ‘R’ ‘1’ ‘0’ Yes Yes Description ‘ ...
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... M29W800DT, M29W800DB Appendix C Block protection Block protection can be used to prevent any operation from modifying the data stored in the Flash. Each block can be protected individually. Once protected, program and erase operations on the block fail to change the data. There are three techniques that can be used to control block protection, these are the programmer technique, the in-system technique and temporary unprotection. Temporary unprotection is controlled by the reset/block temporary unprotection pin, RP ...
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... A12-A18 block address V IH others = A12-A18 block address others = X M29W800DT, M29W800DB Data inputs/outputs DQ15A–1, DQ14-DQ0 X , A15 = Pass = XX01h Retry = XX00h , Retry = XX01h Pass = XX00h ...
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... M29W800DT, M29W800DB Figure 18. Programmer equipment block protect flowchart START ADDRESS = BLOCK ADDRESS Wait 4µ Wait 100µ A0 Wait 4µ Wait 60ns Read DATA DATA NO = 01h ...
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... ADDRESS = CURRENT BLOCK ADDRESS A1 Wait 4µ Wait 60ns Read DATA NO DATA = 00h NO ++n = 1000 YES FAIL M29W800DT, M29W800DB INCREMENT CURRENT BLOCK YES LAST NO BLOCK YES PASS AI03470 ...
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... M29W800DT, M29W800DB Figure 20. In-system equipment block protect flowchart START WRITE 60h ADDRESS = BLOCK ADDRESS WRITE 60h ADDRESS = BLOCK ADDRESS Wait 100µs WRITE 40h ADDRESS = BLOCK ADDRESS Wait 4µ ...
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... Wait 4µs READ DATA ADDRESS = CURRENT BLOCK ADDRESS DATA = 00h ++ 1000 YES ISSUE READ/RESET COMMAND FAIL M29W800DT, M29W800DB INCREMENT CURRENT BLOCK YES NO LAST BLOCK YES ISSUE READ/RESET COMMAND PASS AI03472 ...
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... M29W800DT, M29W800DB 10 Revision history Table 29. Document revision history Date Version August 2001 03-Dec-2001 01-Mar-2002 11-Apr-2002 31-Mar-2003 13-Feb-2004 23-Apr-2004 16-Sep-2004 21-Mar-2006 10-Dec-2007 25-Mar-2008 1.0 First issue Block protection appendix added, SO44 drawing and package 2.0 mechanical data updated, CFI Table 26, address 39h/72h data clarified, ...
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... Numonyx StrataFlash is a trademark or registered trademark of Numonyx or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others. 52/52 Please Read Carefully: applications. visiting Numonyx's website at http://www.numonyx.com. Copyright © 11/5/7, Numonyx, B.V., All Rights Reserved. M29W800DT, M29W800DB ...