ICS8430-71B ICST [Integrated Circuit Systems], ICS8430-71B Datasheet - Page 9

• Manufacturer Part Number: ICS8430-71B
• Description: 700MHZ, LOW JITTER, CRYSTAL INTERFACE / LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
• Manufacturer: ICST [Integrated Circuit Systems]

R
I
C
For applications not requiring the use of the crystal oscillator
input, both XTAL_IN and XTAL_OUT can be left floating.
Though not required, but for additional protection, a 1kΩ
resistor can be tied from XTAL_IN to ground.
TEST_CLK I
For applications not requiring the use of the test clock, it can
be left floating. Though not required, but for additional
protection, a 1kΩ resistor can be tied from the TEST_CLK to
ground.
LVCMOS C
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
T
The clock layout topology shown below is a typical termina-
tion for LVPECL outputs. The two different layouts mentioned
are recommended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, termi-
nating resistors (DC current path to ground) or current sources
must be used for functionality. These outputs are designed to
drive 50Ω transmission lines. Matched impedance tech-
8430BY -71
NPUTS
RTT =
RYSTAL
ERMINATION FOR
ECOMMENDATIONS FOR
((V
:
I
NPUT
FOUT
F
OH
IGURE
ONTROL
+ V
NPUT
:
OL
Integrated
Circuit
Systems, Inc.
) / (V
3A. LVPECL O
:
1
P
INS
LVPECL O
CC
:
Z
Z
– 2)) – 2
o
o
= 50Ω
= 50Ω
U
NUSED
Z
o
50Ω
UTPUT
UTPUTS
I
NPUT AND
T
ERMINATION
RTT
www.icst.com/products/hiperclocks.html
50Ω
PRELIMINARY
V
CC
LVCMOS-
FIN
- 2V
O
UTPUT
P
INS
9
TO
700MH
niques should be used to maximize operating frequency
and minimize signal distortion. There are a few simple ter-
mination schemes. Figures 3A and 3B show two different
layouts which are recommended only as guidelines. Other
suitable clock layouts may exist and it would be recom-
mended that the board designers simulate to guarantee
compatibility across all printed circuit and clock component
process variations.
O
LVPECL O
All unused LVPECL outputs can be left floating. We
recommend that there is no trace attached. Both sides of the
differential output pair should either be left floating or
terminated.
-3.3V LVPECL F
UTPUTS
FOUT
F
:
IGURE
UTPUT
Z
, L
3B. LVPECL O
OW
Z
Z
o
o
J
= 50Ω
= 50Ω
ITTER
REQUENCY
125Ω
84Ω
, C
ICS8430B-71
UTPUT
RYSTAL
3.3V
125Ω
84Ω
T
ERMINATION
REV. A SEPTEMBER 20, 2005
S
YNTHESIZER
I
FIN
NTERFACE
/