MT4LC1M16E5 MICRON [Micron Technology], MT4LC1M16E5 Datasheet - Page 22

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MT4LC1M16E5

Manufacturer Part Number
MT4LC1M16E5
Description
EDO DRAM
Manufacturer
MICRON [Micron Technology]
Datasheet

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TIMING PARAMETERS
NOTE: 1. Once
1 Meg x 16 EDO DRAM
D52_B.p65 – Rev. B; Pub. 3/01
SYMBOL
t
t
t
t
t
CHD
CLCH
CP
CSR
RASS
CASL#/
CASH#
RAS#
WE#
DQ
2. Once
V
V
V
V
V
V
V
V
OH
OL
IH
IL
IH
IL
IH
IL
t
t
RASS (MIN) is met and RAS# remains LOW, the DRAM will enter self refresh mode.
RPS is satisfied, a complete burst of all rows should be executed.
MIN
100
15
5
8
5
t RP
t RPC
t CP
-5
MAX
t WRP
t CSR
MIN
100
15
10
t RASS
t CHD
t WRH
5
5
(Addresses and OE# = DON’T CARE)
-6
MAX
(
(
(
(
(
)
(
(
)
)
)
)
)
)
(
(
)
)
(
(
(
(
(
SELF REFRESH CYCLE
)
)
)
)
)
OPEN
UNITS
ns
ns
ns
ns
µs
22
SYMBOL
t
t
t
t
t
RP
RPC
RPS
WRH
WRP
NOTE 1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t RPC
t RPS
MIN
30
90
5
8
8
t CP
t WRP
-5
16Mb: 1 MEG x16
MAX
t WRH
MIN
NOTE 2
105
40
10
10
5
(
)
EDO DRAM
(
)
-6
©2001, Micron Technology, Inc
MAX
DON’T CARE
UNDEFINED
UNITS
ns
ns
ns
ns
ns

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