LTC693 LINER [Linear Technology], LTC693 Datasheet - Page 4

• Manufacturer Part Number: LTC693
• Description: Microprocessor Supervisory Circuits
• Manufacturer: LINER [Linear Technology]

LTC692/LTC693
ELECTRICAL C
PARAMETER
RESET, RESET, WDO, LOW LINE
Output Short-Circuit Current (Note 4)
WDI Input Threshold
WDI Input Current
Power Fail Detector
PFI Input Threshold
PFI Input Threshold PSRR
PFI Input Current
PFO Output Voltage (Note 4)
PFO Short Circuit Source Current
PFI Comparator Response Time (falling)
PFI Comparator Response Time (rising)
Chip Enable Gating
CE IN Threshold
CE IN Pullup Current (Note 7)
CE OUT Output Voltage
CE Propagation Delay
CE OUT Output Short Circuit Current
Oscillator
OSC IN Input Current (Note 7)
OSC SEL Input Pull-Up Current (Note 7)
OSC IN Frequency Range
OSC IN Frequency with External Capacitor
The
temperature range.
Note 1: Absolute maximum ratings are those values beyond which the life
of the device may be impaired.
Note 2: All voltage values are with respect to GND.
Note 3: For military temperature range, consult the factory.
Note 4: The output pins of BATT ON, LOW LINE, PFO, WDO, RESET and
RESET have weak internal pull-ups of typically 3 A. However, external
pull-up resistors may be used when higher speed is required.
4
V
CC
(Note 4)
(Note 4)
= Full Operating Range, V
denotes specifications which apply over the full operating
HARA TERISTICS
BATT
= 2.8V, T
C
A
= 25 C, unless otherwise noted.
CONDITONS
Output Source Current
Output Sink Current
Logic Low
Logic High
WDI = V
WDI = 0V
V
I
I
PFI = HIGH, PFO = 0V
PFI = LOW, PFO = V
V
V
I
I
I
V
Output Source Current
Output Sink Current
OSC SEL = 0V
OSC SEL = 0V, C
SINK
SOURCE
SINK
SOURCE
SOURCE
CC
IL
IH
CC
V
V
with 10k Pull-Up
IN
IN
= 5V
= 5V, C
= 3.2mA
= –20mV, V
= 20mV, V
= 3.2mA
OUT
= 1 A
= 3.0mA
= 1 A, V
L
= 20pF
OD
CC
OSC
OD
= 15mV
= 0V
OUT
= 15mV
= 47pF
Note 5: The LTC692/LTC693 have minimum reset active times of 140ms
(200ms typically). The reset active time of the LTC693 can be adjusted
(see Table 2 in Applications Information Section).
Note 6: The external clock feeding into the circuit passes through the
oscillator before clocking the watchdog timer (See BLOCK DIAGRAM).
Variation in the time-out period is caused by phase errors which occur
when the oscillator divides the external clock by 64. The resulting variation
in the time-out period is 64 clocks plus one clock of jitter.
Note 7: The input pins of CE IN, OSC IN and OSC SEL have weak internal
pull-ups which pull to the supply when the input pins are floating.
V
V
OUT
OUT
MIN
1.25
– 50
3.5
3.5
2.0
1
1
0
– 1.50
– 0.05
TYP
1.3
0.3
– 8
0.01
25
25
40
20
20
30
35
4
3
8
3
5
4
3
2
2
MAX
1.35
250
0.8
0.4
0.8
0.4
25
50
25
35
45
25
UNITS
mV/V
kHz
kHz
mA
mA
mA
mA
nA
ns
ns
A
V
V
A
A
V
V
V
A
V
V
A
V
V
V
A
A
s
s
s