EPM570 Altera, EPM570 Datasheet - Page 56

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EPM570

Manufacturer Part Number
EPM570
Description
MAX II Device Family
Manufacturer
Altera
Datasheet

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Hot Socketing
4–2
MAX II Device Handbook, Volume 1
I/O Pins Remain Tri-Stated during Power-Up
A device that does not support hot-socketing may interrupt system
operation or cause contention by driving out before or during power-up.
In a hot socketing situation, the MAX II device’s output buffers are turned
off during system power-up. MAX II devices do not drive out until the
device attains proper operating conditions and is fully configured. See
“Power-On Reset Circuitry” on page 4–6
voltages.
Signal Pins Do Not Drive the V
MAX II devices do not have a current path from I/O pins or GCLK[3..0]
pins to the V
device may be inserted into (or removed from) a system board that was
powered up without damaging or interfering with system-board
operation. When hot socketing, MAX II devices may have a minimal
effect on the signal integrity of the backplane.
AC & DC Specifications
You can power up or power down the V
sequence. There are no V
During hot socketing, the I/O pin capacitance is less than 8 pF. MAX II
devices meet the following hot socketing specification:
1
The hot socketing DC specification is| I
The hot socketing AC specification is dependent on the signal
voltages and board capacitance:
where capacitance is the sum of I/O pin, trace, and connector
capacitance.
| I
IOPIN
MAX II devices are immune to latch-up when hot socketing.
If the TCK JTAG input pin is driven high during hot-socketing,
the current on that pin might exceed the specifications above.
Core Version a.b.c variable
| < (∆v/∆t) × capacitance
CCIO
or V
CCINT
CC
pins before or during power-up. A MAX II
ramp rate requirements for MAX II devices.
CCIO
or V
CCINT
CCIO
for information about turn-on
Power Supplies
IOPIN
and V
| < 300 µA.
CCINT
Altera Corporation
pins in any
December 2004

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