EPM570 Altera, EPM570 Datasheet - Page 13

• Manufacturer Part Number: EPM570
• Description: MAX II Device Family
• Manufacturer: Altera

Figure 2–5. LAB-Wide Control Signals
Logic Elements
Altera Corporation
December 2004
Dedicated
LAB Column
Clocks
Local
Interconnect
Local
Interconnect
Local
Interconnect
Local
Interconnect
Local
Interconnect
Local
Interconnect
4
With the LAB-wide addnsub control signal, a single LE can implement a
one-bit adder and subtractor. This saves LE resources and improves
performance for logic functions such as correlators and signed
multipliers that alternate between addition and subtraction depending
on data.
The LAB column clocks [3..0], driven by the global clock network, and
LAB local interconnect generate the LAB-wide control signals. The
MultiTrack
non-global control signal generation. The MultiTrack interconnect’s
inherent low skew allows clock and control signal distribution in addition
to data.
The smallest unit of logic in the MAX II architecture, the LE, is compact
and provides advanced features with efficient logic utilization. Each LE
contains a four-input LUT, which is a function generator that can
implement any function of four variables. In addition, each LE contains a
programmable register and carry chain with carry select capability. A
single LE also supports dynamic single bit addition or subtraction mode
selectable by an LAB-wide control signal. Each LE drives all types of
interconnects: local, row, column, LUT chain, register chain, and
DirectLink interconnects. See
labclk1
Figure 2–5
labclkena1
Core Version a.b.c variable
TM
interconnect structure drives the LAB local interconnect for
labclk2
shows the LAB control signal generation circuit.
labclkena2
Figure
asyncload
or labpre
2–6.
syncload
MAX II Device Handbook, Volume 1
labclr1
labclr2
MAX II Architecture
synclr
addnsub
2–7