EPM2210 Altera Corporation, EPM2210 Datasheet - Page 74

• Manufacturer Part Number: EPM2210
• Description: (EPMxxxx) JTAG & In-System Programmability
• Manufacturer: Altera Corporation

Timing Model & Specifications
5–12
MAX II Device Handbook, Volume 1
Notes to
(1)
(2)
(3)
(4)
t
t
t
t
t
t
t
t
t
t
t
CO
CLKHL
C
FASTIO
IN
GLOB
IOE
DL
OD
XZ
ZX
Table 5–15. LE Internal Timing Microparameters (Part 2 of 2)
Table 5–16. IOE Internal Timing Microparameters
Symbol
Symbol
(3)
(4)
(2)
Delay numbers for t
are based on an EPM240 device target.
Refer to
slew rates.
Refer to
and slew rates.
Refer to
and slew rates.
(1)
Table 5–16
Data output delay
from adjacent LE to
I/O block
I/O input pad and
buffer delay
I/O input pad and
buffer delay use as
global signal pin
Internally generated
output enable delay
Input routing delay
Output delay buffer
and pad delay
Output buffer disable
delay
Output buffer enable
delay
LE register clock-to-
output delay
Minimum clock high
or low time
Register control
delay
Table 5–29
Table 5–19
Table 5–17
Parameter
Parameter
:
and
and
and
GLOB
Table 5–31
Table 5–20
Table 5–18
differ for each device density and speed grade. The delay numbers shown in
-3 Speed Grade
-3 Speed Grade
for delay adders associated with different I/O Standards, drive strengths, and
for t
for t
Min
170
Min
Core Version a.b.c variable
XZ
ZX
delay adders associated with different I/O Standards, drive strengths,
delay adders associated with different I/O Standards, drive strengths,
1,588
1,064
1,003
Max
Max
243
875
164
708
424
171
756
-4 Speed Grade
-4 Speed Grade
Min
Min
221
1,137
2,064
1,383
1,303
Max
Max
315
214
920
552
222
982
-5 Speed Grade
-5 Speed Grade
Min
Min
272
Altera Corporation
1,400
1,132
2,540
1,702
1,209
1,604
Max
Max
388
261
679
274
December 2004
Table 5–16
Unit
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps