IDT7130 Integrated Device Technology, IDT7130 Datasheet - Page 10

• Manufacturer Part Number: IDT7130
• Description: HIGH-SPEED 1K x 8 DUAL-PORT STATIC RAM
• Manufacturer: Integrated Device Technology

IDT7130SA/LA AND IDT7140SA/LA
HIGH-SPEED 1K x 8 DUAL-PORT STATIC RAM WITH INTERRUPTS
TIMING WAVEFORM OF WRITE WITH
NOTES:
1. t
2. BUSY is asserted on port 'B' blocking R/W'B', until BUSY'B' goes High.
3. All timing is the same for the left and right ports. Port 'A' may be either the left or right
TIMING WAVEFORM OF BUSY ARBITRATION CONTROLLED BY
TIMING WAVEFORM OF BUSY ARBITRATION CONTROLLED BY ADDRESS MATCH TIMING
NOTES:
1. All timing is the same for left and right ports. Port “A” may be either left or right port. Port “B” is the opposite from port “A”.
2. If t
ADDR
ADDR
BUSY
'A'
port. Port "B" is opposite from port "A".
WH
BUSY
asserted (7130 only).
AND
ADDR
must be met for both BUSY Input (IDT7140, slave) or Output (IDT7130 master).
APS
CE
CE
'B'
'A'
'B'
is not satisified, the
'B'
'A'
'A'
'B'
t
APS
(2)
BUSY
BUSY
R/
R/
t
W
APS
W
will be asserted on one side or the other, but there is no guarantee on which side
'B'
'B'
'A'
(2)
ADDRESSES MATCH
t
BAA
t
RC
t
BAC
OR t
t
WC
WB
BUSY
BUSY
BUSY
BUSY
BUSY
(3)
ADDRESSES MATCH
(2)
6.01
t
WP
t
BDC
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ADDRESSES DO NOT MATCH
t
BDA
t
WH
(1)
CE CE CE CE CE
TIMING
2689 drw 13
BUSY
(1)
will be
2689 drw 15
2689 drw 14
10
(1)