ICS9147-09 Integrated Circuit Systems, ICS9147-09 Datasheet - Page 2

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ICS9147-09

Manufacturer Part Number
ICS9147-09
Description
Frequency Generator & Integrated Buffers
Manufacturer
Integrated Circuit Systems
Datasheet
17, 18, 20, 21, 28,
8, 10, 11, 12, 14,
PIN NUMBER
29, 31, 32, 34,
27, 33, 39, 45
3, 9, 16, 22,
1, 6, 13, 19,
30, 36, 48
35, 37, 38
7, 25, 26
42, 43
41
15
23
24
40
46
44
47
2
4
5
REF
FS1
GND
X1
X2
VDDL
BUS (1:5)
BUS6
FS0
CPU_STOP#
PD#
24M
BSEL
VDD3
SDRAM (1:12)
CPUH/AGP
CPUL (1:2)
N/C
48M
FS2
IOAPIC
PIN NAME
TYPE
OUT
PWR
OUT
PWR
OUT
OUT
PWR
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
Reference clock output*
Logic input frequency select Bit1*. Input latched at Poweron.
Ground.
Crystal input. Nominally 14.318 MHz. Has internal load cap
Crystal output. Has internal load cap and feedack resistor to X1
2.5 or 3.3V buffer power for CPUL and IOAPIC output buffers.
BUS clock outputs. see select table for frequency
BUS clock output. See select table for frequency.*
Logic input frequency select Bit0.*. Input latched at Poweron.
Halts CPU Clocks at Logic "0" level when low. Internal Pull-up
Powers down chip, active low. Internal Pull-up
24MHz fixed clock.*
Logic input* for selecting synchronous or asynchronous BUS
frequency- see table above. Input latched at Poweron.*
3.3 volt core logic and buffer power
SDRAM clocks at CPU speed. See select table for frequency.
CPU clock operates at SDRAM VDD level (3.3V nom), for AGP etc.
CPU clocks .See select table for frequency. Operates at down to
2.5V controlled by VDDL pin.
Pins not internally connected.
48 MHz fixed clock output*.
Logic input frequency select Bit 2*. Input latched at Poweron.
Reference clock (14.318MHz) powered by VDDL,
operating 2.5 to 3.3V.
DESCRIPTION

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