ICS9147-01 Integrated Circuit Systems, ICS9147-01 Datasheet
ICS9147-01
Related parts for ICS9147-01
ICS9147-01 Summary of contents
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... Circuit Systems, Inc. Frequency Generator & Integrated Buffers for PENTIUM General Description The ICS9147-01 generates all clocks required for high speed RISC or CISC microprocessor systems such as Intel PentiumPro. Two bidirectional I/O pins (FS1,FS2) are latched at power-on to the functionality table, with FS0 selectable in real-time to toggle between conditions ...
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... ICS9147-01 Pin Descriptions ...
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... ICS9147- ...
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... PD# and BUSSTOP# are shown in a high (true) state. BUSSTOP# Timing Diagram BUSSTOP asynchronous input to the ICS9147-01 used to turn off the BUS (1:6) clocks for low power operation. BUSSTOP# is synchronized by the ICS9147-01 internally. BUS (1:6) clocks are stopped in a low state and started with a full high pulse width guaranteed ...
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... The power down selection is used to put the part into a very low power state without turning off the power to the part. PD asynchronous active low input. This signal is synchronized internal by the ICS9147-01 prior to its control action of powering down the clock synthesizer. PD asynchronous function for powering up the system. Internal clocks will not be running after the device is put in power down state ...
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... ICS9147-01 Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0 Ambient Operating Temperature . . . . . . . . . . 0°C to +70°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied ...
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... ICS9147- ...
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... ICS9147-01 Shared Pin Operation - Input/Output Pins Pins 1 and 2 on the ICS9147-01 serve as dual signal functions to the device. During initial power-up, they act as input pins. The logic level (voltage) that is present on these pins at this time is read and stored into a 4-bit internal data latch. At ...
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... Fig. 2a Fig ICS9147-01 ...
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... ICS9147-01 Recommended PCB Layout for ICS9147-01 NOTE: This PCB Layout is based layer board with an internal Ground (common) and Vcc plane. Placement of components will depend on routing of signal trace. The 0.1uf Capacitors should be placed as close as possible to the Power pins. Placement on the backside of the board is also possible. The Ferrite Beads can be replaced with 10-15ohm Resistors ...
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... COMMON DIMENSIONS SEATING SEATING N PLANE PLANE 48 Reference Doc.: JEDEC Publication 95, MO-118 10-0034 F=SSOP ICS = Standard Device 11 ICS9147-01 In Millimeters In Inches COMMON DIMENSIONS MIN MAX MIN 2.41 2.80 .095 0.20 0.40 .008 0.20 0.34 .008 0.13 0.25 .005 SEE VARIATIONS SEE VARIATIONS 10.03 10.68 .395 7.40 7.60 .291 ...