ICS9147-03 Integrated Circuit Systems, ICS9147-03 Datasheet
ICS9147-03
Related parts for ICS9147-03
ICS9147-03 Summary of contents
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... Systems, Inc. Frequency Generator & Integrated Buffers for 686 Series CPUs General Description The ICS9147-03 generates all clocks required for high speed RISC or CISC microprocessor systems such as Intel PentiumPro, AMD or Cyrix processors. Four bidirectional I/O pins (FS0, FS1, FS2, BSEL) are latched at power-on to the functionality table ...
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... ICS9147-03 Functionality with (14.31818 MHz input ...
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... ICS9147-03 +0 ...
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... ICS9147-03 Electrical Characteristics at 3.3V ° 3.0 – 3 – unless otherwise stated ...
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... Shared Pin Operation - Input/Output Pins Pins 2, 15, 46 and 47 on the ICS9147-03 serve as dual signal functions to the device. During initial power-up, they act as input pins. The logic level (voltage) that is present on these pins at this time is read and stored into a 4-bit internal data latch. At the end of Power-On reset, (see AC characteristics for timing values), the device changes the mode of operations for these pins to an output function ...
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... ICS9147-03 Fig. 2a Fig ...
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... Recommended PCB Layout for ICS9147-03 NOTE: This PCB Layout is based layer board with an internal Ground (common) and Vcc plane. Placement of components will depend on routing of signal trace. The 0.1uf Capacitors should be placed as close as possible to the Power pins. Placement on the backside of the board is also possible. The Ferrite Beads can be replaced with 10-15ohm Resistors ...
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... ICS9147- INDEX INDEX AREA AREA 45° 45° SEATING SEATING b PLANE PLANE .10 (.004) C .10 (.004) C 300 mil SSOP Package Ordering Information ICS9147F-03 Example: ICS XXXX F - PPP Pattern Number ( digit number for parts with ROM code patterns) ...