M2051 Integrated Circuit Systems, M2051 Datasheet

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M2051

Manufacturer Part Number
M2051
Description
Manufacturer
Integrated Circuit Systems
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
M2051
Manufacturer:
TOSHIBA
Quantity:
6 221
Part Number:
M2051-11-625.0000
Manufacturer:
MAXIM
Quantity:
12
G
The M2050/51/52 is a VCSO (Voltage Controlled SAW
multiplication ratios. The ratios are pin-selected from
pre-programming look-up tables.
F
◆ Integrated SAW delay line; Output of 15 to 700 MHz
◆ Low phase jitter < 0.5 ps rms typical
◆ Pin-selectable PLL divider ratios support 64b/66b and
◆ Scalable dividers provide further adjustment of loop
◆ LVPECL clock output (CML and LVDS options available)
◆ Reference clock inputs support differential LVDS,
◆ Loss of Lock (LOL) output pin
◆ Narrow Bandwidth control input (NBW Pin)
◆ Hitless Switching (HS) options with or without Phase
◆ Single 3.3V power supply
◆ Small 9 x 9 mm SMT (surface mount) package
S
M2050/51/52 Datasheet Rev 1.0
I n t e g r a t e d C i r c u i t S y s t e m s , I n c .
EATURES
IMPLIFIED
(12kHz to 20MHz or 50Hz to 80MHz)
FEC encoding/decoding ratios:
bandwidth as well as jitter tolerance
LVPECL, as well as single-ended LVCMOS, LVTTL
Build-out (PBO) available; performance conforms with
SONET (GR-253) /SDH (G.813) MTIE and TDEV during
reference clock reselection
ENERAL
• M2050: Map 10GbE to LAN, 255/238 FEC, or 255/237 FEC
• M2051: De-map 10GbE LAN or 255/238 FEC to 10GbE
• M2052: De-map 255/237 FEC & 255/238 FEC to 10GbE LAN
M2050/51/52 SAW PLL for 10GbE 64b/66b FEC
Integrated
Circuit
Systems, Inc.
D
FEC_SEL1:0
FIN_SEL1:0
nDIF_REF0
nDIF_REF1
B
DIF_REF0
DIF_REF1
ESCRIPTION
P_SEL2:0
REF_SEL
LOCK
Oscillator) based clock PLL
designed for FEC clock ratio
translation in 10Gb optical systems
such as 10GbE 64b/66b. It supports
both mapping and de-mapping of
64b/66b encoding and FEC
(Forward Error Correction) clock
NBW
LOL
2
2
3
M2050, 51, 52
D
IAGRAM
MUX
0
1
Mfec and Rfec
Divider
P r e l i m i n a r y I n f o r m a t i o n
Rfec
Div
LUT
C o m m u n i c a t i o n s M o d u l e s
Detector
Phase
Figure 2: Simplified Block Diagram
Mfec Div
Mfin Divider
*
LUT
Mfin Divider
(1, 4, 5, 25)
Loop
Filter
Note 1: Input reference clock can be base rate divided by “Mfin”.
Note 2: Output rate can be base rate divided by “P”.
P
Example I/O Clock Frequency Combinations
Using M2050 Mapper PLL
* Specify VCSO center frequency at time of order.
IN
Rate (MHz)
Base Input
625.0000
625.0000
644.5313
P Divider
LUT
A
FEC_SEL0
FEC_SEL1
FIN_SEL0
SSIGNMENT
VCSO
SAW PLL
NBW
VCC
DNC
DNC
DNC
LOL
(1, 4, 5, 25 or TriState)
1
Table 1: Example I/O Clock Frequency Combinations
P Divider
w w w. i c s t . c o m
28
29
30
31
32
33
34
35
36
Figure 1: Pin Assignment
Mapper Ratio
(Pin Selectable)
Mfec / Rfec
FOR
( T o p V i e w )
TriState
33 / 32
15 / 14
15 / 14
M 2 0 5 0
M 2 0 5 1
M 2 0 5 2
(9 x 9 mm SMT)
M2050/51/52
10G
t e l ( 5 0 8 ) 8 5 2 - 5 4 0 0
B
18
17
16
15
14
13
12
11
10
E 64
nFOUT0
nFOUT1
FOUT1
FOUT0
Revised 23Jun2005
VCSO* and Base
Output Rate
P_SEL0
P_SEL1
nFOUT0
FOUT0
GND
nFOUT1
FOUT1
VCC
GND
B
644.5313
669.6429
690.5692
(MHz)
/66
B
2
FEC

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M2051 Summary of contents

Page 1

... Pin-selectable PLL divider ratios support 64b/66b and FEC encoding/decoding ratios: • M2050: Map 10GbE to LAN, 255/238 FEC, or 255/237 FEC • M2051: De-map 10GbE LAN or 255/238 FEC to 10GbE • M2052: De-map 255/237 FEC & 255/238 FEC to 10GbE LAN ◆ Scalable dividers provide further adjustment of loop bandwidth as well as jitter tolerance ◆ ...

Page 2

Integrated Circuit Systems, Inc ESCRIPTIONS Number Name I/O Ground 10, 14, 26 GND 4 OP_IN Input 9 nOP_IN 5 nOP_OUT Output 8 OP_OUT 6 nVC Input 7 VC Power 11, 19, 33 VCC 12 ...

Page 3

... Table 3: M2050/51/52: Mfin Value LUT Note 1: For M2050 with Fvcso = 669.6429 Note 2: For M2051 and M2052 with Fvcso = 625.0000. M2050/51/52 Datasheet Rev 1 LOOP ...

Page 4

... FEC to 10GbE Table 5: M2051: De-map LUT (10GbE LAN or 255/238 FEC to 10GbE) The Mfec divider value for the first three settings allows one set of passive filter components to be used for all three of these modes. The fourth setting maps “10GbE 255/238 FEC” using the lowest Mfec value possible ...

Page 5

... Circuit Systems, Inc. dividers also control the phase detector frequency. The feedback divider (labeled “Mfin Divider”) provides the broader division options needed to accomodate various reference clock frequencies. For example, the M2051-11-625.0000 (see “Ordering on pg. 12 has a 625.00 Information” ) frequency: • ...

Page 6

Integrated Circuit Systems, Inc. forced to its upper or lower operating limit which is typically about 250 ppm above or below the VCSO center frequency (no more than 500 ppm above or below). In normal phase-locked condition, the instantaneous phase ...

Page 7

Integrated Circuit Systems, Inc. Optional Hitless Switching and Phase Build-out The M2050/51/52 is available with a Hitless Switching feature that is enabled during device manufacturing. In addition, a Phase Build-out feature is also offered. These features are offered as device ...

Page 8

... Example Loop Filter Component Values Phase Det. R Loop C Loop R Post Freq. (MHz) µF 28.0 1.0 15.0 kΩ Table 10: Example External Loop Filter Component Values for M2051-11-625.0000 1 Example Loop Filter Component Values Phase Det. R Loop C Loop R Post Freq. (MHz) µF 8.1586 51.0 1.0 33.2 kΩ Table 11: Example External Loop Filter Component Values for M2052-11-644.5313 ...

Page 9

Integrated Circuit Systems, Inc BSOLUTE AXIMUM ATINGS Symbol Parameter V Inputs I V Outputs O V Power Supply Voltage CC T Storage Temperature S Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent ...

Page 10

Integrated Circuit Systems, Inc LECTRICAL PECIFICATIONS DC Characteristics Unless stated otherwise 3.3V +5%, LVPECL outputs terminated with 50Ω Symbol Parameter Power Supply V Positive Supply Voltage CC I Power Supply Current ...

Page 11

Integrated Circuit Systems, Inc LECTRICAL PECIFICATIONS AC Characteristics Unless stated otherwise 3.3V +5%, LVPECL outputs terminated with 50Ω Symbol Parameter F Input Frequency IN F Output Frequency OUT VCSO ...

Page 12

... EADLESS HIP Standard VCSO Output Frequencies (MHz) Note *: Fout can equal Fvcso divided by 25. Order Part Number (Examples) commercial M2051 - 11 - 625.0000 M2051 - 11 I 625.0000 industrial commercial M2050 - 11 - 644.5313 M2050 - 11 I 644.5313 industrial ● ...

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