CY7C09279 Cypress Semiconductor, CY7C09279 Datasheet
CY7C09279
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CY7C09279 Summary of contents
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... Features • True dual-ported memory cells which allow simulta- neous access of the same memory location • Six Flow-Through/Pipelined devices — 32K x 16/18 organization (CY7C09279/379) — 64K x 16/18 organization (CY7C09289/389) • Three Modes — Flow-Through — Pipelined — Burst • Pipelined output mode on both ports allows fast 100- MHz cycle time • ...
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... Functional Description The CY7C09279/89 and CY7C09379/89 are high-speed syn- chronous CMOS 32K, and 64K x 16/18 dual-port static RAMs. Two ports are provided, permitting independent, simultaneous access for reads and writes to any location in memory. isters on control, address, and data lines allow for minimal set- up and hold times ...
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... A8R 74 A9R 73 A10R 72 A11R 71 A12R 70 A13R 69 A14R [8] 68 A15R 67 LBR 66 UBR 65 CE0R 64 CE1R 63 CNTRSTR 62 R/WR 61 GND 60 OER 59 FT/PIPER 58 I/O17R 57 GND 56 I/O16R 55 I/O15R 54 I/O14R 53 I/O13R 52 I/O12R 51 I/O11R CY7C09279/89 CY7C09279/89 CY7C09379/89 CY7C09379/ 215 35 0.05 - 195 30 0.05 Page ...
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... For read operations both Output Current into Outputs (LOW)............................. 20 mA Static Discharge Voltage ........................................... >1100V Latch-Up Current..................................................... >200 mA Operating Range Range Commercial [9] Industrial CY7C09279/89 CY7C09379/89 AND CE must be asserted MAX –I/O ). 8/9L 15/17L Ambient Temperature ...
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... Ind. Com’l. 0.05 0.5 0.05 [9] Ind. Com’l. 160 200 145 [9] Ind. Description Test Conditions T = 25° MHz 5.0V CC AND CE 0 CY7C09279/89 CY7C09379/89 CY7C09279/89 CY7C09379/89 -9 2.4 2.4 0.4 0.4 2.2 2.2 0.8 0.8 10 –10 10 –10 420 215 360 195 245 410 105 110 220 145 205 ...
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... Document #: 38-06040 Rev 250 TH OUTPUT (b) Thévenin Equivalent (Load 1) [11] 3.0V GND = 1. Capacitance (pF) (b) Load Derating Curve CY7C09279/89 CY7C09379/89 OUTPUT 1.4V TH (c) Three-State Delay (Load 2) (Used for CKLZ including scope and jig) ALL INPUT PULSES 90% 90% 10% ...
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... CY7C09279/89 CY7C09379/89 -12 Max. Min. Max. Unit 40 33 MHz 67 50 MHz ...
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... CYC2 t CL2 A A n+1 t CD2 Q t CKLZ = following the next rising edge of the clock constantly loads the address on the rising edge of the CLK. Numbers are for reference only. IL CY7C09279/89 CY7C09379/ n+2 n+3 t CKHZ Q Q n+1 n OHZ ...
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... HC SC [20, 21, 22, 23 MATCH CD1 CWDD , R/W, CNTEN, and CNTRST = for the left port, which is being written to. IH CY7C09279/89 CY7C09379/ CD2 CKHZ CKLZ CD2 CKHZ ...
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... n+1 n CD2 CKHZ Q n READ NO OPERATION [17, 24, 25, 26 n+1 n+2 n n+2 n+3 t CD2 OHZ READ WRITE . IH CY7C09279/89 CY7C09379/ n+3 n CKLZ WRITE READ A A n+4 n CKLZ CD2 READ Page CD2 Q n+3 Q n+4 ...
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... n+1 n CD1 CKHZ NO READ OPERATION [15, 17, 24, 25 n OHZ READ CY7C09279/89 CY7C09379/ n+2 n n+2 t CD1 Q n CKLZ DC WRITE READ A A n+3 n CD1 CKLZ DC WRITE READ A n+4 t CD1 ...
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... R/W and CNTRST = Document #: 38-06040 Rev. ** [27] t SAD t SCN t CD2 READ WITH COUNTER [27 n+1 READ WITH COUNTER . IH CY7C09279/89 CY7C09379/89 t HAD t HCN Q n+1 n+2 COUNTER HOLD READ WITH COUNTER t t SAD HAD t t SCN HCN Q Q n+2 n+3 COUNTER HOLD Q n+3 READ WITH ...
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... The “Internal Address” is equal to the “External Address” when ADS = V Document #: 38-06040 Rev n n+1 n+1 WRITE WITH WRITE COUNTER COUNTER HOLD . IH and equals the counter output when ADS = V IL CY7C09279/89 CY7C09379/89 [28, 29 n+2 n n+2 n+3 n+4 WRITE WITH COUNTER . IH A n+4 Page ...
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... 31. No dead cycle exists during counter reset. A READ or WRITE cycle may be coincidental with the counter reset. Document #: 38-06040 Rev. ** [17, 29, 30, 31 WRITE READ ADDRESS 0 ADDRESS 0 CY7C09279/89 CY7C09379/ n READ READ ...
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... Mode Reset out( out( out( Increment out(n+ CY7C09279/89 CY7C09379/89 Operation 17 [35] Deselected [35] Deselected Write IN [34] Read Outputs Disabled Operation Counter Reset to Address 0 Load Address Load into Counter Hold External Address Blocked—Counter Disabled Counter Enabled—Internal Address ...
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... A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack CY7C09279/89 CY7C09379/89 Operating Range Commercial Commercial Commercial Commercial Operating Range Commercial ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C09279/89 CY7C09379/89 ...
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... Document Title: CY7C09279/89, CY7C09379/89 32K/64K X 16/18 Synchronous Dual Port Static RAM Document Number: 38-06040 Issue REV. ECN NO. Date ** 110188 09/29/01 Document #: 38-06040 Rev. ** Orig. of Change Description of Change SZV Change from Spec number: 38-00664 to 38-06040 CY7C09279/89 CY7C09379/89 Page ...