CYWUSB6932-48LFXC Cypress Semiconductor, CYWUSB6932-48LFXC Datasheet - Page 22

• Manufacturer Part Number: CYWUSB6932-48LFXC
• Description: WirelessUSB LS 2.4-GHz DSSS Radio SoC
• Manufacturer: Cypress Semiconductor

8.0
Table 8-1. Pin Description Table for the CYWUSB6932/CYWUSB6934
Document 38-16007 Rev. *G
6, 9, 16, 28,
1, 2, 3, 4, 7,
29, 32, 41,
12, 15, 17,
18, 27, 30,
31, 36, 37,
39, 40, 43,
42, 44, 45
8, 10, 11,
Pin QFN
Exposed
Paddle
47, 48
46
38
35
26
33
14
34
20
19
21
23
24
25
22
13
5
Pin Definitions
RFIN
RFOUT
X13
X13IN
X13OUT
PD
RESET
PACTL
DIO
DIOVAL
IRQ
MOSI
MISO
SCK
SS
VCC
GND
NC
GND
Name
Output /Hi-Z
Output/Hi-Z
Output/Hi-Z
Output
Type
Input
Input
Input
Input
Input
Input
Input
Input
GND
GND
VCC
N/A
I/O
I/O
I/O
Default
Output System Clock . Buffered 13-MHz system clock.
Output IRQ . Interrupt and SERDES Bypass Mode DIOCLK.
Input
Input
Input
Input
Hi-Z
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
H
L
L
RF Input . Modulated RF signal received (CYWUSB6934 only).
RF Output . Modulated RF signal to be transmitted.
Crystal Input . (refer to Section 4.6 ).
Crystal Input . (refer to Section 4.6 ).
Power Down . Asserting this input (low), will put the
CYWUSB6932/CYWUSB6934 in the Suspend Mode (X13OUT is 0 when PD
is Low).
Active LOW Reset . Device reset.
PACTL . External Power Amplifier control. Pull-down or make output.
Data Input/Output. SERDES Bypass Mode Data Transmit/Receive.
Data I/O Valid . SERDES Bypass Mode Data Transmit/Receive Valid.
Master-Output-Slave-Input Data . SPI data input pin.
Master-Input-Slave-Output Data . SPI data output pin.
SPI Input Clock . SPI clock.
Slave Select Enable . SPI enable.
V
Ground = 0V .
Must be tied to Ground.
Must be tied to Ground.
CC
= 2.7V to 3.6V.
Description
CYWUSB6932
CYWUSB6934
Page 22 of 30