LTC3856 LINER [Linear Technology], LTC3856 Datasheet - Page 22

• Manufacturer Part Number: LTC3856
• Description: 2-Phase Synchronous Step-Down DC/DC Controller with Diffamp
• Manufacturer: LINER [Linear Technology]

LTC3856
applicaTions inForMaTion
The peak-to-peak MOSFET gate drive levels are set by the
voltage, V
MOSFETs in most applications. Pay close attention to the
BV
logic-level MOSFETs are limited to 30V or less. Selection
criteria for the power MOSFETs include the on-resistance,
R
output current. MOSFET input capacitance is a combination
of several components but can be taken from the typical
gate charge curve included on most data sheets (Figure 9).
The curve is generated by forcing a constant input current
into the gate of a common source, current source loaded
stage, then plotting the gate voltage versus time.
The initial slope is the effect of the gate-to-source and
the gate-to-drain capacitance. The flat portion of the
curve is the result of the Miller multiplication effect of the
drain-to-gate capacitance as the drain drops the voltage
across the current source load. The upper sloping line is
due to the drain-to-gate accumulation capacitance and
the gate-to-source capacitance. The Miller charge (the
increase in coulombs on the horizontal axis from a to b
while the curve is flat) is specified for a given V
voltage, but can be adjusted for different V
multiplying the ratio of the application V
specified V
term is to take the change in gate charge from points
a and b on a manufacturer’s data sheet and divide by
the stated V
important selection criteria for determining the transition
loss term in the top MOSFET but is not directly specified
on MOSFET data sheets. C
sometimes but definitions of these parameters are not
included. When the controller is operating in continuous

DS(ON)
DSS
V
GS
specification for the MOSFETs as well; many of the
, input capacitance, input voltage and maximum
C
CC
MILLER
a
DS
MILLER EFFECT
Figure 9. Gate Charge Characteristic
, requiring the use of logic-level threshold
DS
= (Q
values. A way to estimate the C
Q
voltage specified. C
IN
B
– Q
A
)/V
b
DS
RSS
and C
V
+
GS
–
MILLER
V
OS
DS
DS
are specified
to the curve
is the most
+
voltages by
–
3856 F09
V
DS
DS
V
IN
MILLER
drain
mode, the duty cycles for the top and bottom MOSFETs
are given by:
The power dissipation for the main and synchronous
MOSFETs at maximum output current are given by:
where N is the number of output stages, δ is the tem-
perature dependency of R
driver resistance (approximately 2Ω at V
V
tial in the particular application. V
specified typical gate threshold voltage specified in the
power MOSFET data sheet at the specified drain current.
C
curve from the MOSFET data sheet and the technique just
described.
Both MOSFETs have I
equation includes an additional term for transition losses,
which peak at the highest input voltage. For V
the high current efficiency generally improves with larger
MOSFETs, while for V
increase to the point that the use of a higher R
with lower C
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low, or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
IN
MILLER
Main Switch Duty Cycle
P
Synchronous Switc
P
is the drain potential and the change in drain poten-
SYNC
MAIN
is the calculated capacitance using the gate charge
=
=
( )




V
V
V
V
MILLER
IN
V
IN
OUT
CC
IN
2 2
–
V
–
IN

 

 
V
1
V
I
OUT
I
actually provides higher efficiency. The
MAX
TH IL
MAX
2
2
N
N
IN
R losses while the topside N-channel
( )
h h Duty Cycle

 
> 20V, the transition losses rapidly

 

 
I
( )(
MAX
2
+
R
DS(ON)
N
=
(
DR
V V
1 δ
TH IL
V
+
 
 
V
OUT
1
2
IN
( )
, R
C
(
)
1 δ R
R
MILLER
TH(IL)




+
DR
DS ON
=
•
(

 
f
)
is the effective top
V
is the data sheet
IN
)
DS ON
)
GS
+
•
–
V
(
DS(ON)
IN
V
= V
OUT
)
IN
MILLER
device

 
< 20V,
3856f
),