LTC3856 LINER [Linear Technology], LTC3856 Datasheet - Page 13

• Manufacturer Part Number: LTC3856
• Description: 2-Phase Synchronous Step-Down DC/DC Controller with Diffamp
• Manufacturer: LINER [Linear Technology]

operaTion
Light Load Current Operation (Burst Mode Operation,
Stage Shedding or Continuous Conduction)
The LTC3856 can be enabled to enter high efficiency
Burst Mode operation, Stage Shedding mode or forced
continuous conduction mode. To select forced continuous
operation, tie the MODE pin to a DC voltage below 0.6V
(e.g., SGND). To select Stage Shedding mode of opera-
tion, tie the MODE pin to INTV
operation, float the MODE pin.
When the controller is enabled for Burst Mode operation,
the peak current in the inductor is set to approximately
one-sixth of the maximum sense voltage even though
the voltage on the I
peak current can be programmed by the ISET pin. If the
average inductor current is higher than the load current,
the error amplifier, EA, will decrease the voltage on the
I
signal goes high (enabling sleep mode) and the external
MOSFETs are turned off. In sleep mode, the load current
is supplied by the output capacitor. As the output voltage
decreases, the EA’s output begins to rise. When the output
voltage drops enough, the sleep signal goes low, and the
controller resumes normal operation by turning on the
top external MOSFET on the next cycle of the internal
oscillator. When a controller is enabled for Burst Mode
operation, the inductor current is not allowed to reverse.
The reverse current comparator, I
external MOSFET just before the inductor current reaches
zero, preventing it from reversing and going negative.
Thus, the controller operates in discontinuous operation.
In forced continuous operation, the inductor current is
allowed to reverse at light loads or under large transient
conditions. The peak inductor current is determined by
the voltage on the I
this mode, the efficiency at light loads is lower than in
Burst Mode operation. However, continuous mode has the
advantages of lower output ripple and less interference
with audio circuitry.
When the MODE pin is connected to INTV
operates in Stage Shedding mode at light loads. The
controller will turn off channel 2 and increase the current
gain of the first channel to ensure a smooth transition. The
TH
pin. When the I
TH
TH
TH
(Refer to Functional Diagram)
pin, just as in normal operation. In
voltage drops, the internal sleep
pin indicates a lower value. The
CC
REV
. To select Burst Mode
, turns off the bottom
CC
, the LTC3856
threshold where the controller goes into Stage Shedding
mode is where the I
be programmed by the ISET pin. The inductor current is
not allowed to reverse in this mode (discontinuous op-
eration). At very light loads, the current comparator may
remain tripped for several cycles and force the external top
MOSFET to stay off for the same number of cycles (i.e.,
skipping pulses). This mode exhibits low output ripple as
well as low audio noise and reduced RF interference as
compared to Burst Mode operation. It provides a higher
low current efficiency than forced continuous mode, but
not nearly as high as Burst Mode operation.
Multichip Operations (PHASMD and CLKOUT Pins)
The LTC3856’s two channels are 180° out-of-phase, provid-
ing multiphase operation. This configuration can provide
enough power for most of the high current applications.
However, for even higher power applications, the LTC3856
can be configured for PolyPhase and multichip operation.
The LTC3856 features PHASMD and CLKOUT pins which
enable multiple LTC3856s to operate out-of-phase, as
shown in Table 1. The CLKOUT signal is out-of-phase
with respect to phase 1 of the controller depending on the
PHASMD pin setting. In Stage Shedding mode, however,
the CLKOUT signal is 180° out-of-phase with respect to
phase 1 of the controller.
Table 1.
Frequency Selection and Phase-Locked Loop
(FREQ and PLLIN Pins)
The selection of switching frequency is a trade-off between
efficiency and component size. Low frequency opera-
tion increases efficiency by reducing MOSFET switching
losses, but requires larger inductance and/or capacitance
to maintain low output ripple voltage.
If the PLLIN pin is not being driven by an external clock
source, the FREQ pin can be used to program the controller’s
PHASMD
Phase 1
Phase 2
CLKOUT
TH
GND
180°
60°
0°
voltage drops below 0.5V, but it can
FLOAT
180°
90°
0°
LTC3856
INTV
240°
120°
0°

CC
3856f