AD5512AACPZ AD [Analog Devices], AD5512AACPZ Datasheet - Page 7

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AD5512AACPZ

Manufacturer Part Number
AD5512AACPZ
Description
2.7 V to 5.5 V, Serial-Input, Voltage-Output, 16-/12-Bit nanoDACs in LFCSP
Manufacturer
AD [Analog Devices]
Datasheet

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Preliminary Technical Data
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 4. AD5541A Pin Function Descriptions
8-Lead
LFCSP
6
1
2
3
4
7
5
Figure 6. AD5541A-1 8-Lead LFCSP Pin Configuration
Figure 7. AD5541A 8-Lead SOIC Pin Configuration
8-Lead
SOIC
1
2
3
4
5
6
7
8
REF
CS
SCLK
DIN
A G N D
V
R E F
O U T
Pin No.
C S
1
2
3
4
N C = N O C O N N E C T
10-Lead
LFCSP
2
3
4
5
6
7
9
1
10
8
1
2
3
4
(N o t to S cale)
AD5541A-1
(N o t to S cale)
TO P V IE W
AD5541A
TO P V IE W
10-Lead
MSOP
2
3
4
5
6
7
9
1
10
8
8
7
6
5
8 GND
7 VDD
6 VOUT
5 CLR
V
D G N D
D IN
S C L K
D D
Mnemonic
VOUT
AGND
REF
CS
SCLK
DIN
DGND
VDD
CLR
VLOGIC
LDAC
Description
Analog Output Voltage from the DAC.
Ground Reference Point for Analog Circuitry.
Voltage Reference Input for the DAC. Connect to an external 2.5 V reference.
Reference can range from 2 V to V
Logic Input Signal. The chip select signal is used to frame the serial data input.
Clock Input. Data is clocked into the input register on the rising edge of SCLK.
Duty cycle must be between 40% and 60%.
Serial Data Input. This device accepts 16-bit words. Data is clocked into the
input register on the rising edge of SCLK.
Digital Ground. Ground reference for digital circuitry.
Analog Supply Voltage, 5 V ± 10%.
Asynchronous Clear Input. The CLR input is falling edge sensitive. When CLR is
low, all LDAC pulses are ignored. When CLR is activated, the input register and
the DAC register are cleared to the model selectable midscale or zeroscale .
Logic Power Supply.
LDAC Input. When this input is taken low, the DAC register is simultaneously
updated with the contents of the input register.
Rev. PrA | Page 7 of 24
Figure 8. AD5541A 10-Lead LFCSP Pin Configuration
Figure 9. AD5541A 10-Lead MSOP Pin Configuration
VDD
VOUT
AGND
REF
CS
VDD
VOUT
AGND
REF
CS
AD5541A/AD5542A/AD5512AA
1
2
3
4
5
DD
.
N C = N O C O N N E C T
1
2
3
4
5
NC = NO CONNECT
(N o t to S cale)
TO P V IE W
AD5541A
(Not to Scale)
AD5541A
TOP VIEW
10 VLOGIC
9
8
7
6
10
9
8
7
6
DGND
LDAC
DIN
SCLK
VLOGIC
DGND
LDAC
DIN
SCLK

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