AD5512AACPZ AD [Analog Devices], AD5512AACPZ Datasheet
AD5512AACPZ
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AD5512AACPZ Summary of contents
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Preliminary Technical Data FEATURES Low power, 1 LSB INL nanoDACs AD5541A: 16 bits AD5542A: 16 bits AD5512A: 12 bits 2 5.5 V single-supply operation Low glitch: 0.5 nV-s Unbuffered voltage output capable of driving 60 kΩ loads directly ...
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AD5541A/AD5542A/AD5512A Figure 4. 1 All references to the AD5541A/AD5542A/AD5512A incorporate all models (see Ordering Guide) including the AD5541A-1/AD5542A-1 unless specified. Preliminary Technical Data Rev. PrA| Page ...
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Preliminary Technical Data TABLE OF CONTENTS Features ............................................................................................... 1 Applications ....................................................................................... 1 General Description .......................................................................... 1 Functional Block Diagrams ............................................................. 1 Revision History ................................................................................ 3 Specifications ..................................................................................... 4 Timing Characteristics ................................................................. 5 Absolute Maximum Ratings ............................................................ 6 ESD Caution .................................................................................. ...
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AD5541A/AD5542A/AD5512A SPECIFICATIONS 5.5V 2.5 V, AGND = DGND = REF Table 1. Parameter STATIC PERFORMANCE AD5541A/AD5542A Resolution Relative Accuracy (INL) Differential Nonlinearity (DNL) AD5512A Resolution Relative Accuracy (INL) Differential Nonlinearity ...
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Preliminary Technical Data Parameter POWER REQUIREMENTS LOGIC I LOGIC Power Dissipation 1 Reference input resistance is code-dependent, minimum at 0x8555. 2 Guaranteed by design, not subject to production test. TIMING CHARACTERISTICS V = 1.8 V ...
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AD5541A/AD5542A/AD5512A ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter V to AGND DD Digital Input Voltage to DGND V to AGND OUT AGND, AGNDF, AGNDS to DGND Input Current to Any Pin Except Supplies Operating ...
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Preliminary Technical Data PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS REF 1 AD5541A cale) SCLK 3 DIN ...
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AD5541A/AD5542A/AD5512A Figure 10. AD5542A-1 10-Lead LFCSP Pin Configuration AD5542A ...
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Preliminary Technical Data TYPICAL PERFORMANCE CHARACTERISTICS Figure 14. Integral Nonlinearity vs. Code Figure 15. Integral Nonlinearity vs. Temperature Figure 16. Linearity Error vs. Supply Voltage AD5541A/AD5542A/AD5512AA Figure 17. Differential Nonlinearity vs. Code Figure 18. Differential Nonlinearity vs. Temperature Figure 19. ...
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AD5541A/AD5542A/AD5512A Figure 20. Gain Error vs. Temperature Figure 21. Supply Current vs. Temperature Figure 22. Supply Current vs. Digital Input Voltage Preliminary Technical Data Figure 23. Zero-Code Error vs. Temperature Figure 24. Supply Current vs. Reference Voltage or Supply Voltage ...
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Preliminary Technical Data Figure 26. Digital Feedthrough Figure 27. Digital-to-Analog Glitch Impulse AD5541A/AD5542A/AD5512AA Figure 28. Large Signal Settling Time Figure 29. Small Signal Settling Time Rev. PrA | Page ...
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AD5541A/AD5542A/AD5512A TERMINOLOGY Relative Accuracy or Integral Nonlinearity (INL) For the DAC, relative accuracy or INL is a measure of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer function. A typical INL ...
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Preliminary Technical Data THEORY OF OPERATION The AD5541A/AD5542A/AD5512A are single, 16-bit, serial input, voltage output DACs. They operate from a single supply ranging from 2 and consume typically 300 µA with a supply ...
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AD5541A/AD5542A/AD5512A Assuming a perfect reference, the unipolar worst-case output voltage can be calculated from the following equation × − OUT UNI REF where unipolar mode ...
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Preliminary Technical Data POWER-ON RESET The AD5541/AD5542 have a power-on reset function to ensure that the output known state on power-up. On power-up, the DAC register contains all 0s until the data is loaded from the serial ...
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AD5541A/AD5542A/AD5512A MICROPROCESSOR INTERFACING Microprocessor interfacing to the AD5541/AD5542 is via a serial bus that uses standard protocol that is compatible with DSP processors and microcontrollers. The communications channel requires 4-wire interface consisting of a clock signal, a ...
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Preliminary Technical Data APPLICATIONS INFORMATION OPTOCOUPLER INTERFACE The digital inputs of the AD5541A/AD5542A/AD5512A are Schmitt-triggered so that they can accept slow transitions on the digital input lines. This makes these parts ideal for industrial applications where it may be necessary ...
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OUTLINE DIMENSIONS 3.10 3.00 2.90 0.95 0.85 0.75 0.15 0.05 PIN 1 INDEX AREA 0.80 0.75 0.70 SEATING PLANE 3.10 3.00 2. 5.15 4.90 4. PIN 1 0.50 BSC 1.10 MAX 0.33 SEATING 0.23 PLANE 0.17 ...
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BSC SQ PIN 1 INDEX AREA TOP VIEW 0.80 MAX 0.80 0.55 NOM 0.75 0.70 SEATING PLANE Figure 41. 8-Lead Lead Frame Chip Scale Package [LFCSP] Dimensions shown in millimeters. 5.10 5.00 4. 4.50 4.40 4.30 1 ...
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SQ 2.90 PIN 1 INDICATOR TOP VIEW 0.80 0.75 0.70 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-220-WEED. Figure 43. 16-Lead Lead Frame Chip Scale Package [LFCSP] Dimensions shown in millimeters. 0.30 0. ...
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... LSB ±1 LSB AD5542ABCPZ ±1 LSB ±1 LSB AD5542AACPZ ±2 LSB ±1 LSB AD5442ABCPZ-1 ±1 LSB ±1 LSB AD5512AACPZ ±1 LSB ±1 LSB ORDERING GUIDE Clear to Code Temperature Range Midscale −40°C to +105°C Midscale −40°C to +105°C Midscale − ...
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AD5541A/AD5542A/AD5512A NOTES Preliminary Technical Data Rev. PrA | Page ...
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Preliminary Technical Data NOTES AD5541A/AD5542A/AD5512A Rev. PrA | Page ...
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AD5541A/AD5542A/AD5512A NOTES ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR08516-0-12/09(PrA) Preliminary Technical Data Rev. PrA | Page ...