LP3907SQ-JIXI INTERSIL [Intersil Corporation], LP3907SQ-JIXI Datasheet - Page 25

• Manufacturer Part Number: LP3907SQ-JIXI
• Description: Dual High-Current Step-Down DC/DC and Dual Linear Regulator with I2C Compatible Interface
• Manufacturer: INTERSIL [Intersil Corporation]

If the EN1 and RDY1 are initiated in normal operation, then
nPOR is asserted and deasserted as explained above.
In Case 1, we see that case where EN2 and RDY2 are initi-
ated after triggered programmable delay. To prevent the
nPOR being asserted again, a masked window ( 5ms )
counter delay is triggered off the EN2 rising edge. nPOR is
still held HIGH for the duration of the mask, whereupon the
nPOR status afterwards will depend on the status of both
RDY1 and RDY2 lines.
NPOR Mask Window
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In Case 2, we see the case where EN2 is initiated after the
RDY1 triggered programmable delay, but RDY2 never goes
HIGH (Buck2 never turns on). Normal operation operation of
nPOR occurs wilth respect to EN1 and RDY1, and the nPOR
signal is held HIGH for the duration of the mask window. We
see that nPOR goes LOW after the masking window has
timed out because it is now dependent on RDY1 and RDY2,
where RDY2 is LOW.
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