PLL520-20 PhaseLink (PLL), PLL520-20 Datasheet - Page 6

• Manufacturer Part Number: PLL520-20
• Description: , 120-200MHz In, 120-200MHz Out, Pecl,lvds
• Manufacturer: PhaseLink (PLL)

PAD ASSIGNMENT
Note: for optimal Phase Noise performance, it is recommended to bond all optional VDD and GND pads.
47745 Fremont Blvd., Fremont, California 94538 TEL [phone] FAX [phone]
Pad #
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
1
2
3
4
5
6
7
8
9
Low Phase Noise VCXO (for 120-200MHz Fundamental Crystals)
Not connected
Not connected
Not connected
OE_SELECT
OUTSEL1
OUTSEL0
OE_CTRL
Reserved
GNDBUF
GNDBUF
VDDBUF
VDDBUF
PECLB
LVDSB
CMOS
XOUT
VCON
Name
LVDS
PECL
GND
GND
GND
GND
GND
GND
VDD
VDD
VDD
VDD
N/C
XIN
X ( m)
1042
1171
1400
1400
1400
1400
1400
1400
1400
1400
1389
1232
1042
248
361
473
587
702
874
854
659
559
459
358
194
109
109
109
109
109
109
Y ( m)
1089
1227
1365
1365
1365
1365
1365
1365
1365
1365
1365
1223
1017
109
109
109
109
109
109
109
109
125
259
476
616
716
871
858
646
397
181
Preliminary
PLL520-20
Rev 7/01/03 Page 6