PLL520-00 PhaseLink (PLL), PLL520-00 Datasheet - Page 4

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PLL520-00

Manufacturer Part Number
PLL520-00
Description
, 120-200MHz In, 120-800MHz Out, CMOS,pecl,lvds
Manufacturer
PhaseLink (PLL)
Datasheet
5. Jitter specifications
Measured on Wavecrest SIA 3000
6. Phase noise specifications
Note: Phase Noise measured at VCON = 0V
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Period jitter RMS
Period jitter peak-to-peak
Accumulated jitter RMS
Accumulated jitter peak-to-peak
Random Jitter
Integrated jitter RMS at 155MHz
Period jitter RMS
Period jitter peak-to-peak
Accumulated jitter RMS
Accumulated jitter peak-to-peak
Random Jitter
Integrated jitter RMS at 622MHz
Phase Noise relative to
carrier
PARAMETERS
Low Phase Noise VCXO with multipliers (for 120-200MHz Fund Xtal)
PARAMETERS
155.52MHz
622.08MHz
FREQUENCY
At 155.52MHz, with capacitive decoupling
between VDD and GND. Over 10,000 cycles
At 155.52MHz, with capacitive decoupling
between VDD and GND. Over 1,000,000 cycles.
“RJ” measured on Wavecrest SIA 3000
Integrated 12 kHz to 20 MHz
At 622.08MHz, with capacitive decoupling
between VDD and GND. Over 10,000 cycles
At 622.08MHz, with capacitive decoupling
between VDD and GND. Over 1,000,000 cycles.
“RJ” measured on Wavecrest SIA 3000
Integrated 12 kHz to 20 MHz
@10Hz
CONDITIONS
-75
-75
@100Hz
-95
-95
@1kHz
-125
-110
Preliminary
MIN.
@10kHz
-140
-125
TYP.
18.5
2.5
2.5
2.5
0.3
1.6
24
11
45
11
24
PLL520-00
3
@100kHz
Rev 06/26/03 Page 4
-145
-120
MAX.
0.4
1.8
20
27
49
27
UNITS
UNITS
dBc/Hz
ps
ps
ps
ps
ps
ps
ps
ps

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