PLL502-10 PhaseLink (PLL), PLL502-10 Datasheet - Page 5

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PLL502-10

Manufacturer Part Number
PLL502-10
Description
, 12-25MHz In, 750kHz-400MHz Out, CMOS, Pecl, LVDS
Manufacturer
PhaseLink (PLL)
Datasheet
7. LVDS Electrical Characteristics
8. LVDS Switching Characteristics
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Output Differential Voltage
V
Output High Voltage
Output Low Voltage
Offset Voltage
Offset Magnitude Change
Power-off Leakage
Output Short Circuit Current
Differential Clock Rise Time
Differential Clock Fall Time
DD
750kHz – 400MHz Low Phase Noise VCXO (for 12 – 25MHz Crystals)
Magnitude Change
PARAMETERS
PARAMETERS
OUT
OUT
LVDS Levels Test Circuit
OUT
OUT
V
V
DIFF
OD
SYMBOL
SYMBOL
50
50
20%
I
I
V
V
V
V
OXD
OSD
V
V
LVDS Transistion Time Waveform
0V
t
t
OD
OH
OS
OL
r
f
V
OD
OS
OS
t
R
0V (Differential)
80%
V
out
CONDITIONS
CONDITIONS
(see figure)
(see figure)
R
R
C
= V
V
L
L
L
DD
= 100
= 100
= 10 pF
DD
= 0V
or GND
80%
OUT
OUT
LVDS Switching Test Circuit
t
F
20%
1.125
MIN.
MIN.
Preliminary
247
-50
0.9
0.2
0.2
C
C
0
L
L
= 10pF
= 10pF
TYP.
TYP.
-5.7
355
0.7
0.7
1.4
1.1
1.2
V
3
PLL502-10
DIFF
1
MAX.
1.375
MAX.
Rev 11/06/02 Page 5
454
1.0
1.0
1.6
50
25
-8
10
R
L
= 100
UNITS
UNITS
mV
mV
mV
mA
uA
ns
ns
V
V
V

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