PLL502-10 PhaseLink (PLL), PLL502-10 Datasheet - Page 4

• Manufacturer Part Number: PLL502-10
• Description: , 12-25MHz In, 750kHz-400MHz Out, CMOS, Pecl, LVDS
• Manufacturer: PhaseLink (PLL)

4. General Electrical Specifications
5. Jitter specifications
6. Phase noise specifications
Note: Phase Noise measured at VCON = 0V
47745 Fremont Blvd., Fremont, California 94538 TEL [phone] FAX [phone]
Supply Current,
Dynamic (with
Loaded Outputs)
Operating Voltage
Output Clock Duty
Cycle
Short Circuit Current
Period jitter RMS
Accumulated jitter RMS
Integrated jitter RMS
Phase Noise relative to
carrier
PARAMETERS
PARAMETERS
PARAMETERS
750kHz – 400MHz Low Phase Noise VCXO (for 12 – 25MHz Crystals)
SYMBOL
With capacitive decoupling between
VDD and GND.
With capacitive decoupling between
VDD and GND. Over 10,000 cycles.
Integrated 12 kHz to 20 MHz
19.44MHz
106.25MHz
155.52MHz
V
I
FREQUENCY
DD
DD
@ 1.4V (CMOS)
@ 1.25V (LVDS)
@ Vdd – 1.3V (PECL)
CONDITIONS
PECL/LVDS/CMOS
@10Hz
CONDITIONS
-60
-60
-60
Fout < 24MHz
24MHz < Fout < 96MHz
96MHz < Fout < 400MHz
FREQUENCY
@100Hz
155.52MHz
155.52MHz
155.52MHz
19.44MHz
77.76MHz
-90
-90
-90
@1kHz
-112
-112
-112
Preliminary
MIN.
MIN.
3.13
45
45
45
@10kHz
-140
-127
-125
TYP.
TBM
TYP.
5
8
9
3
PLL502-10
50
50
50
50
@100kHz
MAX.
100/80/40
25/25/15
65/45/30
Rev 11/06/02 Page 4
-150
-125
-123
MAX.
4
3.47
55
55
55
UNITS
UNITS
UNITS
dBc/Hz
ps
ps
ps
mA
mA
%
V