ssd1908 Solomon Systech Limited:, ssd1908 Datasheet - Page 8

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ssd1908

Manufacturer Part Number
ssd1908
Description
Lcd Drivers,lcd Controllers
Manufacturer
Solomon Systech Limited:
Datasheet
Table 3-1 : Ordering Information ................................................................................................................... 3
Table 4-1 : TQFP Pin Assignment Table ...................................................................................................... 6
Table 4-2 : TFBGA Pin Assignment Table.................................................................................................... 8
Table 5-1 : Host Interface Pin Descriptions ................................................................................................ 10
Table 5-2 :
Table 5-3 : Clock Input Pin Descriptions..................................................................................................... 13
Table 5-4 : Miscellaneous Pin Descriptions ................................................................................................ 13
Table 5-5 : Power And Ground Pin Descriptions ........................................................................................ 13
Table 5-6 : Summary of Power-On/Reset Options ..................................................................................... 14
Table 5-7 : Host Bus Interface Pin Mapping ............................................................................................... 14
Table 5-8 : LCD Interface Pin Mapping....................................................................................................... 15
Table 5-9 : Data Bus Organization.............................................................................................................. 16
Table 5-10 : Pin State Summary................................................................................................................. 16
Table 7-1 : MCLK Divide Selection ............................................................................................................. 19
Table 7-2 : PCLK Divide Selection.............................................................................................................. 20
Table 7-3 : PCLK Source Selection ............................................................................................................ 20
Table 7-4 : Panel Data Width Selection ...................................................................................................... 24
Table 7-5 : Active Panel Resolution Selection ............................................................................................ 25
Table 7-6 : LCD Panel Type Selection........................................................................................................ 25
Table 7-7 : RGB Sequence Selection ......................................................................................................... 36
Table 7-8 :
Table 7-9 :
Table 7-10 : Display Rotate Mode Select Options ...................................................................................... 39
Table 7-11 : 32-bit Address X Increments for Various Color Depths.......................................................... 44
Table 7-12 : 32-bit Address Y Increments for Various Color Depths.......................................................... 45
Table 7-13 : 32-bit Address X Increments for Various Color Depths.......................................................... 46
Table 7-14 : 32-bit Address Y Increments for Various Color Depths.......................................................... 47
Table 7-15 : PWM Clock Control................................................................................................................. 52
Table 7-16 : CV Pulse Control .................................................................................................................... 53
Table 7-17 : PWM Clock Divide Select Options.......................................................................................... 53
Table 7-18 : CV Pulse Divide Select Options ............................................................................................. 54
Table 7-19 : LPWMOUT Duty Cycle Select Options................................................................................... 55
Table 7-20 : X Increment Mode for Various Color Depths.......................................................................... 58
Table 7-21 : Y Increment Mode for Various Color Depths.......................................................................... 59
Table 8-1 : Absolute Maximum Ratings ...................................................................................................... 66
Table 8-2 : Recommended Operating Conditions ...................................................................................... 66
Table 9-1 : Electrical Characteristics for IOV
Table 10-1 : Clock Input Requirements for CLKI ........................................................................................ 68
Table 10-2 : Clock Input Requirements for AUXCLK.................................................................................. 69
Table 10-3 : Internal Clock Requirements .................................................................................................. 69
Table 10-4 : Generic #1 Interface Timing ................................................................................................... 71
Table 10-5 : Generic #2 Interface Timing ................................................................................................... 73
Table 10-6 : Motorola MC68K #1 Interface Timing ..................................................................................... 75
Table 10-7 : Motorola DragonBall Interface with DTACK# Timing ............................................................. 77
Table 10-8 : Motorola DragonBall Interface without DTACK# Timing ........................................................ 79
Table 10-9 : Hitachi SH-3 Interface Timing................................................................................................. 81
Table 10-10 : Hitachi SH-4 Interface Timing............................................................................................... 83
Table 10-11 : Passive/TFT Power-On Sequence Timing ........................................................................... 84
Table 10-12 : Passive/TFT Power-Off Sequence Timing ........................................................................... 85
Table 10-13 : Power Saving Status Timing................................................................................................. 86
Table 10-14 : Panel Timing Parameter Definition and Register Summary................................................. 87
Table 10-15 : Monochrome 4-Bit Panel A.C. Timing .................................................................................. 92
Table 10-16 : Monochrome 8-Bit Panel A.C. Timing .................................................................................. 95
LCD Interface Pin Descriptions
Color Invert Mode Options
LCD Bit-per-pixel Selection
.................................................................................................... 37
.................................................................................................. 38
DD
List of Tables
............................................................................................ 12
= 3.3V typical.................................................................... 67
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