DS96-L147-203 CONEXANT [Conexant Systems, Inc], DS96-L147-203 Datasheet - Page 91
DS96-L147-203
Manufacturer Part Number
DS96-L147-203
Description
SmartV.XX Modem
Manufacturer
CONEXANT [Conexant Systems, Inc]
Datasheet
1.DS96-L147-203.pdf
(94 pages)
- Current page: 91 of 94
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5.3.2
5.4
5.4.1
102199B
Receiver Character Timeout Interrupts
Transmitter FIFO Interrupt Operation
Transmitter Empty Interrupt
When the FIFO mode is enabled (FCR0 = 1) and receiver interrupt (Receiver Data
Available) is enabled (IER0 = 1), receiver character timeout interrupt operation is as
follows:
1. A Receiver character timeout interrupt code (IIR0-IIR3 = Ch) is set if at least one
When the FIFO mode is enabled (FCR0 = 1) and transmitter interrupt (TX Buffer Empty)
is enabled (IER0 = 1), transmitter interrupt operation is as follows:
The TX Buffer Empty interrupt code (IIR0-IIR3 = 2h) will occur when the TX Buffer is
empty; it is cleared when the TX Buffer is written to (1 to 16 characters) or the IIR is
read.
The TX Buffer Empty indications will be delayed 1 character time minus the last stop bit
time whenever the following occur: THRE = 1 and there have not been at least two bytes
at the same time in the TX FIFO Buffer since the last setting of THRE was set. The first
transmitter interrupt after setting FCR0 will be immediate.
received character is in the RX FIFO, the most recent received serial character was
longer than four continuous character times ago (if 2 stop bits are specified, the
second stop bit is included in this time period), and the most recent host read of the
RX FIFO was longer than four continuous character times ago.
CX81801-7x/8x SmartV.XX Modem Data Sheet
Conexant
5-11
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