sii3114 Silicon image, sii3114 Datasheet - Page 42

• Manufacturer Part Number: sii3114
• Description: Pci To Serial Ata Controller
• Manufacturer: Silicon image

SiI3114 PCI to Serial ATA Controller
Data Sheet
Power Management Control + Status
Address Offset: 64
Access Type: Read/Write
Reset Value: 0x6400_4000
This register defines the power management capabilities associated with the PCI bus. The register bits are
defined below.
PCI Bus Master – Channel 0/2
Address Offset: 70
Access Type: Read/Write
Reset Value: 0x0000_0000
This register defines the PCI bus master register for Channel 0/2 in the SiI3114. The register bits are also
mapped to Base Address 4, Offset 00
these registers are, however, not identical). See “PCI Bus Master – Channel X ” section on page 53 for bit
definitions.
SiI-DS-0103-D
• Bit [31:24] : PPM Data (R) – PCI Power Management Data. This bit field is hardwired to 0x64.
• Bit [23:16] : Reserved (R). This bit field is reserved and returns zeros on a read.
• Bit [15] : PME Status (R) – PME Status. This bit is hardwired to 0. The SiI3114 does not support PME.
• Bit [14:13] : PPM Data Scale (R) – PCI Power Management Data Scale. This bit field is hardwired to 10
• Bit [12:09] : PPM Data Sel (R/W) – PCI Power Management Data Select. This bit field is set by the system
• Bit [08] : PME Ena (R) – PME Enable. This bit is hardwired to 0. The SiI3114 does not support PME.
• Bit [07:02] : Reserved (R). This bit field is reserved and returns zeros on a read.
• Bit [01:00] : PPM Power State (R/W) – PCI Power Management Power State. This bit field is set by the
indicate a scaling factor of 10 mW.
to indicate which data field is to be reported through the PPM Data bits (although current implementation
hardwires the PPM Data to indicate 1 Watt).
system to dictate the current Power State: 00 = D0 (Normal Operation), 01 = D1, 10 = D2, and 11 = D3
(Hot).
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
PPM Data
Reserved
H
H
H
, Base Address 5, Offset 00
Reserved
34
Reserved
H
, and Base Address 5, Offset 10
PPM Data Sel
Reserved
Reserved
© 2007 Silicon Image, Inc.
Silicon Image, Inc.
H
(Note that
B
to