sii3114 Silicon image, sii3114 Datasheet - Page 37
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sii3114
Manufacturer Part Number
sii3114
Description
Pci To Serial Ata Controller
Manufacturer
Silicon image
Datasheet
1.SII3114.pdf
(127 pages)
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Silicon Image, Inc.
Base Address Register 0
Address Offset: 10
Access Type: Read/Write
Reset Value: 0x0000_0001
This register defines the addressing of various control functions within the SiI3114. The register bits are defined
below.
Base Address Register 1
Address Offset: 14
Access Type: Read/Write
Reset Value: 0x0000_0001
This register defines the addressing of various control functions within the SiI3114. The register bits are defined
below.
Base Address Register 2
Address Offset: 18
Access Type: Read/Write
Reset Value: 0x0000_0001
This register defines the addressing of various control functions within the SiI3114. The register bits are defined
below.
© 2007 Silicon Image, Inc.
• Bit [31:03] : Base Address Register 0 (R/W). This register defines the I/O Space base address for Channel
• Bit [02:00] : Base Address Register 0 (R). This bit field is not used and is hardwired to 001
• Bit [31:02] : Base Address Register 1 (R/W). This register defines the I/O Space base address for Channel
• Bit [01:00] : Base Address Register 1 (R). This bit field is not used and is hardwired to 01
• Bit [31:03] : Base Address Register 2 (R/W). This register defines the I/O Space base address for Channel
• Bit [02:00] : Base Address Register 2 (R). This bit field is not used and is hardwired to 001
0 task file registers.
0 Device Control- Alternate Status register.
1 task file registers.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
H
H
H
Base Address Register 0
Base Address Register 2
Base Address Register 1
29
SiI3114 PCI to Serial ATA Controller
B
.
B
B
.
001
001
SiI-DS-0103-D
01
Data Sheet