ch7301c Chrontel, ch7301c Datasheet - Page 25
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ch7301c
Manufacturer Part Number
ch7301c
Description
Ch7301 Dvi Transmitter
Manufacturer
Chrontel
Datasheet
1.CH7301C.pdf
(29 pages)
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Table 17. AC Specifications
f
t
DC
t
t
t
t
t
t
t
t
t
t
t
XCLK
PIXEL
XJIT
DVIR
DVIF
SKDIFF
SKCC
DVIJIT
S
H
R
F
STEP
Symbol
XCLK
Description
Input (XCLK) frequency
Pixel time period
Input (XCLK) Duty Cycle
XCLK clock jitter tolerance
DVI Output Rise Time
(20% - 80%)
DVI Output Fall Time
(20% - 80%)
DVI Output intra-pair skew
DVI Output inter-pair skew
DVI Output Clock Jitter
Setup Time: D[11:0], H, V and DE to
XCLK, XCLK*
Hold Time: D[11:0], H, V and DE to
XCLK, XCLK*
H and V (when configured as outputs)
(20% - 80%)
H and V (when configured as outputs)
(20% - 80%)
De-skew time increment
Output Rise Time
Output Fall Time
Rev. 1.32,
5/24/2005
Test Condition
T
f
f
f
f
f
XCLK = XCLK* to
D[11:0], H, V, DE = Vref
D[11:0], H, V, DE = Vref
to XCLK = XCLK*
15pF load
VDDV = 3.3V
15pF load
VDDV = 3.3V
XCLK
XCLK
XCLK
XCLK
XCLK
S
+ T
= 165MHz
= 165MHz
= 165MHz
= 165MHz
= 165MHz
H
< 1.2ns
25
6.06
30
75
75
0.50
0.50
50
Min
2
Typ
165
70
242
242
90
1.2
150
1.50
1.50
80
40
Max
CH7301C
MHz
ns
%
ns
ps
ps
ps
ns
ps
ns
ns
ns
ns
ps
Unit
25