ch7301c Chrontel, ch7301c Datasheet - Page 21

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ch7301c

Manufacturer Part Number
ch7301c
Description
Ch7301 Dvi Transmitter
Manufacturer
Chrontel
Datasheet

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Test Pattern Register
Bits 1-0 of register TSTP control the test pattern generation block. This test pattern can be used for both the DVI
output and the display monitor output. The pattern generated is determined by Table 11 below.
Bit 3 of register TSTP controls the datapath reset signal. A value of ‘0’ holds the datapath in a reset condition,
while a value of ‘1’, places the datapath in normal mode. The datapath is also reset at power on by an internally
generated power on reset signal.
Bit 4 of register TSTP controls the serial port reset signal. A value of ‘0’ holds the serial port registers in a reset
condition, while a value of ‘1’, places the serial port registers in normal mode. The serial port registers are also reset
at power on by an internally generated power on reset signal.
Power Management Register
Register PM controls which circuitry within the CH7301C is operating, according to Table 12 below.
201-0000-056
Table 11. Test Pattern Control
Table 12. Power Management
TSTP[1:0]
00
01
1X
49h[7] 49h[6] 56h[0] 21h[0] 49h[3:1] 49h[0] Operating State
X
X
X
1
X
DEFAULT:
DEFAULT:
SYMBOL:
SYMBOL:
TYPE:
TYPE:
BIT:
BIT:
X
X
X
1
X
Reserved Reserved Reserved
No test pattern – Input data is used
Color Bars
Horizontal Luminance Ramp
Buffered Clock Output
Rev. 1.32,
0
1
X
X
X
DVIP
R/W
R/W
7
0
7
0
1
1
0
X
X
5/24/2005
DVIL Reserved Reserved DACPD2 DACPD1 DACPD0
R/W
R/W
000
XXX
XXX
XXX
XXX
6
0
6
0
R/W
0
0
0
0
1
R/W
5
0
5
0
VGA to RGB Bypass On
VGA to RGB Bypass On
VGA to RGB Bypass Off
DVI Encode, Serialize,
Transmitter, and PLL on
Full Power Down
ResetIB ResetDB Reserved
R/W
R/W
4
1
4
0
R/W
R/W
3
1
3
0
Functional Description
Input is digital RGB
Input is digital YCrCb
All DACs off
DVI is in normal function
All circuitry is powered down
except serial port
R/W
R/W
Symbol:
Address:
Symbol:
Address:
2
0
2
0
TSTP1
R/W
R/W
CH7301C
1
0
1
0
TSTP
48h
PM
49h
TSTP0
R/W
FPD
R/W
21
0
0
0
1

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