sii1162 Silicon image, sii1162 Datasheet - Page 29

• Manufacturer Part Number: sii1162
• Description: Panellink Transmitter
• Manufacturer: Silicon image

SiI 1162 PanelLink Transmitter
Data Sheet
Packaging
E-pad Enhancement
The SiI 1162 is packaged in a 48-pin TSSOP package with E-pad. The E-pad dimensions are shown in Figure 28.
The E-pad is designed to allow better heat dissipation, and can be soldered down to further improve heat
dissipation in extreme operating environments (ambient temperatures above 70
frequencies (well in excess of 165MHz). For all other applications the E-pad does not need to be soldered down.
Determining Heat Dissipation Requirements
Generally, the thermal performance of a package can be represented by the following parameter (JEDEC
standard JESD 51-2, 51-6):
θ
Where: T
θ
capability. Lower θ
Implementation of the thermal landing area, combined with complete soldering of the package to the landing area,
results in a θ
layer PCB without the thermal landing area, the θ
PCB without the thermal landing area, θ
carry away heat.
SiI -DS-0081-B
JA
JA
, Thermal resistance from junction to ambient
represents the resistance to the heat flow from the chip to ambient air. It is an index of heat dissipation
θ
T
P
JA
J
A
H
is the junction temperature
is the ambient temperature
is the power dissipation
= (T
JA
of 36 ° C/W for a multi-layer PCB (4 or more layers). If the SiI 1162 package is assembled to a two-
J
- T
JA
A
) / P
means better thermal performance.
H
P
JA
Figure 28. E-pad Diagram
is only 60 ° C/W due to the improved ability of the multi-layer PCB to
JA
increases to 85 ° C/W; if instead it is assembled to a multi-layer
25
P1
All dimensions are in millimeters.
E-pad is centered on the package
center lines.
P1
P
E-pad Height
E-pad Width
E-pad Dimensions
°C
) or for high operating
typ
max
2.3
5.5