sii1162 Silicon image, sii1162 Datasheet - Page 27

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sii1162

Manufacturer Part Number
sii1162
Description
Panellink Transmitter
Manufacturer
Silicon image
Datasheet

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SiI 1162 PanelLink Transmitter
Data Sheet
In addition to following the trace routing recommendations, length differences between intra-pair traces listed in
column 2 of Table 5 and inter-pair traces listed in column 3 of Table 5, should be controlled to minimize DVI skew.
Spacing between inter-pair DVI traces should be observed to reduce trace-to-trace couplings. For example,
having wider gaps between inter-pair DVI traces will minimize noise coupling. It is also strongly advised that
ground not be placed adjacent to the DVI traces on the same layer. Table 5 lists the recommended limits for the
parameters listed above.
The layout in Figure 26 illustrates an optimized AGP ADD Card with source termination, input termination
resistors and DVI connector mapping which follows the guidelines listed above. The trace length from the SiI
1162 to the DVI connector can be long; however, it is strongly recommended that the intra-pair and inter-pair
trace lengths follow the guidelines listed in Table 5.
SiI -DS-0081-B
Parameter
Max
Min
Figure 26. Source Termination to DVI Connector Illustration
Differential pair
Intra-pair
length
+0.75”
Table 5. Routing Guidelines for DVI Traces
or
Differential pair to
Differential pair
Inter-pair
23
length
+3”
or
Separation Based
on 2 Layer Board
Inter–pair Trace
Recommended
2x trace width
Recommended Inter–
pair Trace Separation
Based on 4 Layer
2x trace width
Board

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