sii1162 Silicon image, sii1162 Datasheet - Page 19

• Manufacturer Part Number: sii1162
• Description: Panellink Transmitter
• Manufacturer: Silicon image

The SiI 1162 slave state machine does not require an internal clock and supports only byte read and write. Page
mode is not supported. The 7-bit binary address of the I
operation while R=0 sets a write operation. Pin A1 by default has a weak internal pull down resistor, making the
default I
up resistor should be added. Please see Figure 13 for a byte read operation and Figure 14 for a byte write
operation. For more detailed information on I
available from Philips Semiconductors Inc.
SiI 1162 PanelLink Transmitter
Data Sheet
I
I
To program the SiI 1162 under the following conditions, use the sample programming sequence in Table 3:
SiI -DS-0081-B
2
2
C Slave Interface
C Programming Sequence Example
Register
0x08
0x09
0x08
Bus Activity :
Bus Activity :
2
C address 0x70. To set the value of A1 to a bit 1 or to set the I
•
•
•
•
SDA Line
SiI 1162
Master
Data latched in 12-bit mode,
Dual Edge Clock with Primary Edge as the falling edge,
De-skew enabled at nominal setting, and
No Hotplug detection through MSEN pin.
Value
0x30
0x00
0x31
Bus Activity :
Bus Activity :
SDA Line
SiI 1162
Master
S
Enable HEN, VEN, 1
MSEN disabled.
Set PD# to High after the registers above have been programmed.
Address
Slave
Table 3. Sample Programming Sequence for SiI 1162
S
A
1
Address
Slave
A
C
K
st
Register Address
data latched on falling edge with PD# low until all registers are programmed.
Figure 13. I
Figure 14. I
A
1
2
C protocols please refer to I
A
C
K
15
2
Address
2
C Byte Read
C Byte Write
A
C
K
2
C machine is “0111 00A
S
Description
Address
Slave
A
C
K
2
C address for the SiI 1162 to 0x72, a pull
A
1
Data
A
C
K
2
C Bus Specification version 2.1
1
R” where R =1 sets a read
Data
A
C
K
P
P