as28f128j3a Austin Semiconductor, Inc., as28f128j3a Datasheet - Page 3

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as28f128j3a

Manufacturer Part Number
as28f128j3a
Description
Plastic Encapsulated Microcircuit 128mb, X8 And X16 Q-flash Memory Even Sectored, Single Bit Per Cell Architecture
Manufacturer
Austin Semiconductor, Inc.
Datasheet
AS28F128J3A
Rev. 5.5 3/09
Three Chip Enable (CEx) pins are used for enabling and
disabling the device by activating the device’s control logic,
input buffer, decoders, and sense amplifiers.
BYTE\ enables the device to be used in x8 or x16 configuration.
Byte=Low (logic 0) selects and 8-bit mode with address zero
(A0) selecting the High or Low Byte and Byte=High (logic 1)
selects the 16-bit or Word mode. When the device is in Word
mode, address one (A1) becomes the low order address bit
and address zero (A0) becomes a no-connect (NC).
RP\ is used to reset the device. When the device is disabled
and RP\ is at VCC, the STANDBY mode is enabled. A reset
time (tRWH) is required after RP\ switches to a High (logic 1)
and the outputs become valid. Likewise, the device has a wake
time (tRS) from RP\ High until WRITES to the Command User
Interface [CUI] are recognized, RESETS the ISM and clears the
status register.
Pin Description Table
Capacitance
Stress greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions greater than those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum
conditions for any duration or segment of time may affect device
reliability.
Signal Name
Address
Chip Enables
Write Enable
Reset/Power Down
Output Enable
Byte Mode Control
Programming Voltage
Status Pin/Flag
Input/Output Voltage
Supply Voltage
Digital Ground
No Connect(s)
Input Capacitance
Output Capacitance
Parameter/Condition
A0, A1, A2, A3, A4,
A5, A6, A7, A8, A9,
A12,A13,A14,A15,
A16,A17,A18,A19,
A20,A21,A22,A23
AUSTIN SEMICONDUCTOR, INC.
CE0, CE1, CE2
A10, A11,
Symbol
BYTE\
Symbol
VPEN
VCCQ
VCCQ
GND
WE\
OE\
Cbyte
RP\
STS
NC
Cout
Cin
Austin Semiconductor, Inc.
Output
Supply
Supply
Supply
Typ
Input
Input
Input
Input
Input
Input
Input
Type
14
5
5
32,28,27,26,
25,24,23,22,
20,19,18,17,
13,12,11,10,
14, 2, 29
21,42,48
4,3,1,30
8,7,6,5,
1,30,56
9, 37
Max
Pin
55
16
54
31
15
53
43
16
12
8
Address Inputs during READ and WRITE Operations. A0 is only used in x8
mode and will be a NC in x16 mode.
Three Chip Enable pins for Multiple devices. See chart for function
Write Control
Reset/Power Down, When Low the control pin resets the status Reg.and
ISM to array READ mode.
Output Enable control enable data output buffers when Low, and when
High the output buffers are disabled
Configuration Control pin. When High the device is in x16 mode, when
Low the device is in Byte mode (x8)
Necessary Voltage pin for Programming, Erasing or configuring lock bits.
Typically connected to VCC. When VPEN</=VPENLK, this
enables Hardware Write Protect.
Indicates the status of the ISM. When configured in level mode, STS acts
as a RY/BY\ pin. When configured in its pulse mode, it can
pulse to indicate PROGRAM and or ERASE completion.
Separate/Isolated Voltage supply for Input/Output bus. Allows
voltage matching to different interface standards.
Power Supply: 2.7V 3.6V
Ground
No electrical connection or function
Units
pF
pF
pF
3
Absolute Maximum Ratings
Notes
1: All specified voltages are with respect to GND. Minimum DC
voltage is -0.5v on input/output pins and -0.2v on Vcc and VPEN
pins. During transitions, this level may undershoot to -2.0v for
periods </= 20ns. Maximum DC voltage on input/output pins,
Vcc and VPEN is VCC+0.5V which, during transitions, may
overshoot to Vcc + 2.0v for periods <20ns.
Chip Enable Truth Table
CE2
VIL
VIL
VIL
VIL
VIH
VIH
VIH
VIH
Voltage
Temperature Under Bias
Storage Temperature
Short Circuit Current
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
CE1
VIL
VIL
VIH
VIH
VIL
VIL
VIH
VIH
Description
CE0
VIL
VIH
VIL
VIH
VIL
VIH
VIL
VIH
Device
Enabled
Disabled
Disabled
Disabled
Enabled
Enabled
Enabled
Disabled
Min
55
65
AS28F128J3A
Max
125
125
100
Q-Flash
Units
mA
o
o
C
C
PEM
PEM
PEM
PEM
PEM
Notes
1

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