MRF24J40-I MICROCHIP [Microchip Technology], MRF24J40-I Datasheet - Page 5

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MRF24J40-I

Manufacturer Part Number
MRF24J40-I
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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1.0
The MRF24J40 is an IEEE 802.15.4-2003 compliant
transceiver supporting MiWi™, ZigBee™ and other pro-
prietary protocols. The MRF24J40 integrates wireless
RF, PHY layer baseband and MAC layer architectures
that can be combined with a simple microprocessor to
apply low data rate to a multitude of applications that
include home automation, consumer electronics, PC
peripherals, toys, industrial automation and more. The
MRF24J40 device integrates a receiver, transmitter,
VCO and PLL into a single integrated circuit. It uses
advanced radio architecture to minimize external part
count and power consumption. The MRF24J40
MAC/baseband provides hardware architecture for both
IEEE 802.15.4 MAC and PHY layers. It mainly consists
of TX/RX FIFOs, a CSMA-CA controller, superframe
constructor, receive frame filter, security engine and
digital signal processing module. The MRF24J40 is
fabricated by advanced 0.18 μm CMOS process and is
offered in a 40-pin QFN 6x6 mm
TABLE 1-1:
© 2006 Microchip Technology Inc.
IEEE 802.15.4™ Specification Compliant
Integrated Oscillator Drive
Reference Clock Output
Power-Saving Mode Support
Current Consumption
Sleep Mode
Serial Communications
Packages
OVERVIEW
Features
DEVICE FEATURES FOR THE MRF24J40 (40-PIN DEVICE)
2
package.
Advance Information
Typical 18 mA in RX and 22 mA in TX
Features are summarized in Table 1-1 and the pinout
for this device is listed in Table 1-2.
The MRF24J40 consists of four major functional
blocks:
1.
2.
3.
4.
The device also contains other support blocks, such as
the on-chip voltage regulator, security module and
system control logic.
40-Pin Leadless QFN 6x6 mm
An SPI interface that serves as a communica-
tion channel between the host controller and the
MRF24J40.
Control registers which are used to control and
monitor the MRF24J40.
The MAC (Medium Access Control) module that
implements IEEE 802.3™ compliant MAC logic.
The PHY (Physical Layer) driver that encodes
and decodes the analog data.
20 MHz and 32.768 kHz
2 μA Typical
SPI (4-wire)
MRF24J40
20 MHz
Yes
Yes
MRF24J40
2
DS39776A-page 3

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