MRF24J40-I MICROCHIP [Microchip Technology], MRF24J40-I Datasheet - Page 35

• Manufacturer Part Number: MRF24J40-I
• Manufacturer: MICROCHIP [Microchip Technology]

7.4.1
When a packet passes all of the enabled filters, it is
placed in the receive FIFO in the following format.
FIGURE 7-3:
© 2006 Microchip Technology Inc.
0x304 + (m – 1)
0x301-0x302
Address
0x305 + m
0x306 + m
0x307 + m
0x308 + m
RECEIVE PACKET LAYOUT
0x300
0x303
0x304
RECEIVE PACKET LAYOUT.
Sequence Number
Packet Length
Frame Control
Data[m – 1]
Memory
Data[...]
(m + 5)
Data[0]
FCS[0]
FCS[1]
RSSI
LQI
Advance Information
Description
The length of the packet, not including
the packet length, but does include the FCS.
The frame control field describing how this packet should
behave.
The sequence number distinguishing this packet.
The destination and source addressing information
as well as any application data.
The CRC value for the packet; written by hardware.
The link quality index of the received packet.
The received signal strength indicator for the received packet.
MRF24J40
DS39776A-page 33