MRF24J40-I MICROCHIP [Microchip Technology], MRF24J40-I Datasheet - Page 19

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MRF24J40-I

Manufacturer Part Number
MRF24J40-I
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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4.3.2
The long address space is accessed by sending a ‘1 ‘
as the first bit of the SPI transfer. The following 10 bits
are the address of the target register. The final bit is a
‘1 ‘ to indicate that the command is a write. On the next
clock edge of SCK, the Most Significant bit of the
register will shift out, followed by the rest of the bits.
FIGURE 4-6:
EXAMPLE 4-4:
© 2006 Microchip Technology Inc.
SDO
SCK
SDI
CS
void SetLongRAMAddress(WORD address, BYTE value)
{
}
WRITING LONG ADDRESS
REGISTERS
1
A9
CSn = 0;
SPIPut((((BYTE)(address>>3))&0b01111111)|0x80);
SPIPut((((BYTE)(address<<5))&0b11100000)|0x10);
SPIPut(value);
CSn = 1;
A8
LONG ADDRESS WRITE
LONG ADDRESS WRITE EXAMPLE
A7
A6
A5
A4
A3
Advance Information
A2
A1
A0
1
4.4
The receive and transmit buffers in the MRF24J40 are
located in the long RAM address space. These buffers
are accessed using the same process as accessing the
long RAM control addresses. The received buffer is
read-only and should not be written to. The use of these
buffers is described in Section 7.0 “Transmitting and
Receiving Packets”.
X
Buffer Interface
X
D7
D6
D5
MRF24J40
D4
D3
DS39776A-page 17
D2
D1
D0

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