SC220 ZARLINK [Zarlink Semiconductor Inc], SC220 Datasheet - Page 12

• Manufacturer Part Number: SC220
• Description: XpressFlow 2020 Ethernet Routing Switch Chipset
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

XpressFlow-2020 Series –
Ethernet Switch Chipset
2
2.1 CAM Interface
t
t
t
t
2.1.1
© 1998 Vertex Networks, Inc.
1999
Direct interface with MUSIC MU9C1480 1k x
64 bit Content Addressable Memory (CAM)
Two access masters: HISC in XpressFlow
Engine, and Switch Manager CPU
Master interface with CAM Interface logic via
two dedicated CAM Command Blocks
Both HISC and Switch Manager CPU can ac-
cess the CAM by setting up their corresponding CAM Command Blocks, and read the return informa-
tion from their own Response Data Block
FUNCTIONAL DESCRIPTION
Expandable to support 8k MAC Addresses
One for HISC
One for Switch Manager CPU
Pin Description
C_D[15:0]
C_CE#
C_WE#
C_CM#
C_EC#
C_MF#
C_FF#
Symbol
P
R
E
I/O-TS
CMOS
Output
CMOS
Output
CMOS
Output
CMOS
Output
L
Type
Input
Input
TTL
TTL
TTL
I
M
Name & Functions
CAM Data Bus bit [15:0] – a 16-bit data bus for Data/Command in-
put/output.
CAM Chip Enable – Enables the CAM by registers the control signals
on its falling edge and release them on its rising edge. Also used for
locking and unlocking the cascaded daisy chain.
CAM Write Enable – allows to write data or command to CAM
CAM Data/Command Select – defines data or command operations
CAM Enable Comparison – latches and enables the MF and FF outputs
during a comparison cycle.
CAM Match Flag – indicates a valid match during a comparison cycle.
CAM Full Flag – indicates there is no empty location in the CAM.
I
N
A
R
Y
I
11
CAM
N
F
Block Diagram – CAM Interface
O
R
Interface
Logic
CAM
M
A
T
I
XpressFlow Engine
Data Block
Data Block
Command
Response
Command
Response
O
Block
Block
N
Rev. 4.5 – February
From HISC
To HISC
From CPU
To CPU
SC220