cxd3152ar Sony Electronics, cxd3152ar Datasheet - Page 4

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cxd3152ar

Manufacturer Part Number
cxd3152ar
Description
Signal Processor Lsi For Single-chip Ccd B/w Camera
Manufacturer
Sony Electronics
Datasheet
D/A Converter
• DAC
Timing Generation
• Timing
Gain Control
Registers
• I
• External EEPROM
9 bits
V
Supports –40 to +130 IRE output
Generation of various DSP internal signal processing pulses
Input clock frequencies:
Slave operation according to the sync signal <CSYNC_IN> from an external TG: Composite sync input
Built-in auto gain control circuit
The maximum AGC (analog gain control) and DGC (digital gain control) gains can be set individually by the
registers.
AGC and DGC can be turned on and off individually by external pins. <AGC, DGC>
The gain control time constants can be set by the registers.
Supports backlight compensation
Various register settings: <SCL, SDA, REGRES>
Slave address: [A6:A0] = 0011111 (b)
Related pins: <SCL, SDA, REGRES>
An EEPROM which supports the I
Register values can be automatically read out during power-on.
2
DD
C bus
EIA (510
CCIR (500
EIA (768
CCIR (752
6 = 3.3V
492)
494)
582) : 18.9375MHz
582) : 28.375MHz
: 19.06993MHz
: 28.63636MHz
2
C bus can be connected.
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CXD3152AR

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