cxd3152ar Sony Electronics, cxd3152ar Datasheet - Page 27

• Manufacturer Part Number: cxd3152ar
• Description: Signal Processor Lsi For Single-chip Ccd B/w Camera
• Manufacturer: Sony Electronics

• Byte-read timing
Note 1) The upper 7 bits of the slave address indicate the device address, while the lowermost bit indicates
Note 2) The CXD3152AR slave address is [A6:A0] = 0011111 (b).
Note 3) ACK is the response acknowledgement signal, and the slave device goes to low.
Note 4) NO ACK means that a response acknowledgement signal is not returned.
Note 5) S: START condition, P: STOP condition
In the byte-read mode, the master device first transmits the START condition, the slave address, and the
byte address of the position to be read to the slave device as a write operation. After the slave returns an
acknowledgement, the master transmits the START condition and slave address (at this time the R/W bit is
set to 1) again. After that, the slave issues an acknowledgement and transfers the read data. The master
generates the STOP condition without transmitting an acknowledgement.
BUS ACTIVITY
BUS ACTIVITY
the R/W mode. (Read mode when this bit is high, and write mode when it is low.)
SDA LINE
MASTER
S
SLAVE
ADDRESS
BYTE
ADDRESS
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S
SLAVE
ADDRESS
DATA
CXD3152AR
P