gc41c501g1-so24i CORERIVER Semiconductor, gc41c501g1-so24i Datasheet - Page 42

• Manufacturer Part Number: gc41c501g1-so24i
• Description: 4-bit Microcontrollers With Reduced 8051 Architecture
• Manufacturer: CORERIVER Semiconductor

CJNE A, dir, rel
Appendix A : Instruction Set (7/19)
Binary Code
Description
Carry Flag
Operation
Example
Cycles
Bytes
Compares the contents of ACC and that of SFR
addressed by four low-order bits of opcode, and
branches if their values are not equal.
The branch destination is computed by adding
the signed relative-displacement in the
second byte of the instruction to the PC, after
incrementing the PC to the start of the next
instruction. The contents of both operands are
not affected by comparison.
The carry flag is set if the unsigned integer
value of ACC is less than the unsigned integer
value of the SFR; otherwise, the carry is cleared.
(PC) ← (PC) + 2
IF (A)
IF (A) < R[dir] THEN (C) ← 1
2
2
; Wait until P0 (Port 0) is 0xE.
MOV A, #0xE
CJNE A, P0, .
1101
≠
R[dir] THEN (PC) ← (PC) + rel
dddd
ELSE (C) ← 0.
; Self looping with "."
rrrr
rrrr
CJNE L, #data, rel
Binary Code
Description
Carry Flag
Operation
LOOP_L:
Example
Cycles
Bytes
Compares the contents of DPL and data in four
low-order bits of opcode, and branches if their
values are not equal.
The branch destination is computed by adding
the signed relative-displacement in the
second byte of the instruction to the PC, after
incrementing the PC to the start of the next
instruction. The contents of DPL is not affected.
The carry flag is set if the unsigned integer
value of DPL is less than the unsigned
integer value of the data; otherwise, the carry
is cleared.
(PC) ← (PC) + 2
IF (L)
IF (L) < #data THEN (C) ← 1
2
2
; Looping with DPL
MOV L, #9
......
......
DEC DPTR
CJNE L, #0, LOOP_L
1010
≠
ATOM1.0 Family
#data THEN (PC) ← (PC) + rel
dddd
ELSE (C) ← 0.
rrrr
Preliminary
; (L) ← 9
; (DP) ← (DP) - 1
; Operations in loop
; Operations in loop
; Repeat until (L) is 0.
rrrr
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