gc41c501g1-so24i CORERIVER Semiconductor, gc41c501g1-so24i Datasheet - Page 18

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gc41c501g1-so24i

Manufacturer Part Number
gc41c501g1-so24i
Description
4-bit Microcontrollers With Reduced 8051 Architecture
Manufacturer
CORERIVER Semiconductor
Datasheet
6.5. I/O Ports : I/O Mapping
User may select I/O port mapping by setting IOCFG SFR.
The functionality of each I/O pins is the same for any mapping.
This configuration option is useful when the pin-to-pin compatibility with existing devices is
essential.
P3.3
P0.0
P0.1
P0.2
P0.3
P1.0
P1.1
P1.2
P1.3
P0.0
P0.1
P0.2
P0.3
P1.0
P1.1
P4.2
XO
XO
V
XI
V
XI
SS
SS
10
10
11
12
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
IOCFG[3:2] == 0
IOCFG[3:2] == 0
20
19
18
17
16
15
14
13
12
11
24
23
22
21
20
19
18
17
16
15
14
13
V
REM
TV
P2.0/SCLK
P2.1/SDAT
P2.2
P2.3
P3.0
P3.1
P3.2
V
REM
TV
P2.0/SCLK
P2.1/SDAT
P2.2
P2.3
P4.3
P3.0
P3.1
P3.2
P3.3
DD
DD
SS
SS
P1.2
P3.3
P0.0
P0.1
P0.2
P0.3
P1.0
P1.1
P1.2
P0.0
P0.1
P0.2
P0.3
P1.0
P1.1
P4.2
XO
XO
V
XI
V
XI
SS
SS
10
10
11
12
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
IOCFG[3:2] == 1
IOCFG[3:2] == 2
ATOM1.0 Family
20
19
18
17
16
15
14
13
12
11
24
23
22
21
20
19
18
17
16
15
14
13
V
REM
TV
P2.0/SCLK
P2.1/SDAT
P2.2
P2.3
P3.0
P3.1
P1.3
V
REM
TV
P2.0/SCLK
P2.1/SDAT
P2.2
P2.3
P4.3
P3.0
P3.1
P3.2
P1.3
DD
DD
SS
SS
Preliminary
[18]

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