cxd2589q Sony Electronics, cxd2589q Datasheet - Page 28

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cxd2589q

Manufacturer Part Number
cxd2589q
Description
Cd Digital Signal Processor
Manufacturer
Sony Electronics
Datasheet

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$EX commands
EPWM SPDC
1
2
CLV mode
Command
CM3
See Timing Charts 1-2 to 1-6.
Figs. 3-1 and 3-2 show the control flow with the microcomputer software in CLV-W mode.
0
0
0
1
0
1
1
1
1
0
CM2
0
0
1
0
Command bit
0
0
0
1
1
1
CM3
D3
ICAP
0
0
1
1
CM1
0
0
1
1
1
1
CM2
D2
SFSL
Command bit
Data 1
0
0
0
0
CM0
CM1
0
0
0
0
1
0
D1
VC2C
0
1
0
0
BRAKE
CM0
Mode
STOP
CLVS
CLVP
CLVA
D0
KICK
HIFC
0
1
1
1
EPWM SPDC ICAP
D3
Spindle stop mode.
Spindle forward rotation mode.
Spindle reverse rotation mode. Valid only when LPWR = 0,
in any mode.
Rough servo mode. When the RF-PLL circuit isn't locked,
this mode is used to pull the disc rotations within the RF-
PLL capture range.
PLL servo mode.
Automatic CLVS/CLVP switching mode.
Used for normal playback.
LPWR
– 28 –
0
0
0
0
D2
Data 2
VPON
0
0
1
1
1
D1
CAV-W
CAV-W
CLV-W
CLV-N
Mode
1
SFSL
D0
Description
Crystal reference CLV servo.
Used for normal-speed
playback in CLV-W mode.
Spindle control with VP0 to 7.
Spindle control with the external
PWM.
VC2C
D3
1
HIFC LPWR VPON
Description
D2
Data 3
D1
CXD2589Q
D0
2

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