em784su16amp-70lfw Emlsi Inc., em784su16amp-70lfw Datasheet - Page 11

• Manufacturer Part Number: em784su16amp-70lfw
• Description: 512k X 16 Bit Pseudo Sram Specification
• Manufacturer: Emlsi Inc.

LOW POWER MODES
Deep Power Down Mode Entry/Exit
NOTES (WRITE CYCLE)
1. A write occurs during the overlap(t
2. t
3. t
4. t
5. Do not access device with cycle timing shorter than t
Low Power Mode Characteristics
ZZ#
CS#
NOTES ( DEEP POWER DOWN )
1. During Deep Power Down mode, all referesh related activity are disabled.
2. This DPD mode is supported in EM784SU16ALP, EM784SU16ANP & EM784SU16ARP.
transition among low CS# and low WE# with asserting UB# or LB# low for single byte operation or simultaneously
asserting UB# and LB# low for word operation. A write ends at the earliest transition among high CS# and high WE#.
The t
CW
AS
WR
is measured from the address valid to the beginning of write.
Deep Power Down
is measured from the end of write to the address change. t
is measured from CS# going low to end of write.
WP
Deep Power Down Entry
Parameter
is measured from the beginning of write to the end of write.
Current
Parameter
t
t
ZZCS
CSZZ
t
ZZP
t
R
t
ZZCS
Symbol
I
ZZ
WP
) of low CS#, low WE# and low UB# or LB#. A write begins at the last
ZZ# < 0.2V, Other inputs = 0 ~ V
(Max. condition : V
Operation Recovery Time
CS# high to ZZ# high
WC
ZZ# low to CS# low
Test Conditions
ZZ# pulse width
CC
for continuous periods > 10us.
Description
=3.3V @ 85
11
t
ZZP
WR
applied in case a write ends as CS# or WE# going high.
CCQ
o
C)
EM784SU16AxP-70LFx
Deep Power Down Exit
512Kx16 Pseudo Static RAM
Min
t
CSZZ
Min.
-
200
20
0
0
Typ
t
R
-
Max.
-
-
-
-
Normal
operation
Max
10
Units
Unit
ns
ns
us
ns
uA