em78f644nso28s ELAN Microelectronics Corp, em78f644nso28s Datasheet - Page 41

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em78f644nso28s

Manufacturer Part Number
em78f644nso28s
Description
Flash Series 8-bit Microcontroller
Manufacturer
ELAN Microelectronics Corp
Datasheet
Product Specification (V1.0) 05.05.2010
(This specification is subject to change without further notice)
Bit 5 (SRO):
Bit 4 (SSE):
Bit 3 (SDOC): SDO output status control bit
Bit 2 ~ Bit 0 (SBRS 2 ~ SBRS0): SPI Baud Rate Select bits
6.1.26 Bank 1 RD SPIRB (SPI Read Buffer)
Bit 7 ~ Bit 0 (SPID7 ~ SPID0): SPI Read data buffer
SBRS2 (Bit 2)
SRB7
Bit 7
0
0
0
0
1
1
1
1
SRB6
Bit 6
SPI Read Overflow bit
0: No overflow
1: A new data is received while the previous data is still being held in
SPI Shift Enable bit
0: Reset as soon as the shifting is completed and the next byte is
1: Start to shift, and keep at “1” while the current byte is still being
This bit will reset to “0” at every 1-byte transmission by the hardware.
0: After Serial data output, the SDO remains high.
1: After Serial data output, the SDO remains low.
the SPIRB register. Under this condition, the data in the SPI Shift
register will be destroyed. To avoid setting this bit, users are
required to read the SPIRB register although only transmission is
implemented. This can only occur in Slave mode.
ready to shift.
transmitted.
SBRS1 (Bit 1)
For F642/542N, F641/541N, this register is reserved.
SRB5
Bit 5
0
0
1
1
0
0
1
1
EM78F648/644/642/641/548/544/542/541N
SRB4
Bit 4
SBRS0 (Bit 0)
NOTE
0
1
0
1
0
1
0
1
SRB3
Bit 3
SRB2
Bit 2
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
8-Bit Microcontroller
SRB1
Bit 1
Fosc/2
Fosc/4
Fosc/8
Fosc/16
Fosc/32
Fosc/64
/SS enable
/SS disable
Baud Rate
SRB0
Bit 0
• 31

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