sm8211m Nippon Precision Circuits Inc, (NPC), sm8211m Datasheet - Page 7

• Manufacturer Part Number: sm8211m
• Description: Pocsag Decoder For Pagers
• Manufacturer: Nippon Precision Circuits Inc, (NPC)

Idle signal (dummy signal)
An idle word can be inserted into either the address
or message signal to indicate that the word contains
no information. The idle word bit pattern is shown in
table 3. Message reception is halted when the
receiver detects an idle word.
In pager systems that send numeric data, the number
of frames varies with the type of message being sent.
In this case, an idle signal is transmitted to indicate
completion of the message.
Table 3. Idle code word
Receive signal duty factor
During preamble detection, the preamble pattern
(1,0) is recognized at duty factors from 25% (min) to
75% (max) of the (1,0) preamble cycle.
number
Bit
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
Bit value
0
1
1
1
1
0
1
0
1
0
0
0
1
0
0
1
number
Bit
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Bit value
1
1
0
0
0
0
0
1
1
0
0
1
0
1
1
1
SM8211M
Battery Saving (BS1, BS2, BS3)
The SM8211M controls the intermittent-duty opera-
tion of the RF stage, which reduces battery consump-
tion, and outputs three control signals (BS1, BS2,
BS3). The function each signal controls in each
mode is described below.
Note also that (BS3 rising-edge setup time)
rising-edge setup time) should be 2.
BS1 (RF-control main output signal)—The RF
stage is active when BS1 is HIGH. The rising-
edge setup time for receive timing is set by flags
RF0 to RF5 (60 steps). The maximum setup time
is 49.167 ms at 1200 bps, and 115.234 ms at 512
bps.
Note that 3C, 3D, 3E and 3F are invalid settings
for BS1.
BS2 (RF-control output signal)—BS2 is used to
control the discharge of the receive signal DC-cut
capacitor. The function of BS2 is determined by
flag BS2, as described below.
• When flag BS2 is 0, pin BS2 goes HIGH
• When flag BS2 is 1, pin BS2 goes HIGH during
BS3 (RF-control output signal)—BS3 is used to
control PLL operation when the PLL is used. The
rising-edge setup time for receive timing is set by
flags PL0 to PL5 (60 steps). The maximum setup
time is 50.833 ms at 1200 bps, and 119.141 ms at
512 bps.
Note that 3E and 3F are invalid settings for BS3.
together with BS1 and then goes LOW again
after the BS1 setup time. However, in lock
mode (during address/message reception), it
stays LOW.
lock mode sync code receive timing, and pre-
amble mode and idle mode signal receive tim-
ing.
NIPPON PRECISION CIRCUITS—7
(BS1