lc74772v Sanyo Semiconductor Corporation, lc74772v Datasheet - Page 8

• Manufacturer Part Number: lc74772v
• Description: Camcorder On-screen Display Lsi
• Manufacturer: Sanyo Semiconductor Corporation

First byte
First byte
Note: This register is set to 0 on a reset (either by the RST pin or by a command reset).
DA0 to DA7
DA0 to DA7
COMMAND 1 (System control setup 2)
COMMAND 2 (Input control)
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Register name
Register name
MOD1
MOD0
CSYN
VSYN
HSYN
DATA
POLT
POLT
POLT
MOD
FMT
ATR
FMT
CLK
CLK
CLK
—
—
—
—
—
—
—
—
State
State
0
0
0
1
0
1
0
1
0
1
0
1
0
0
1
0
0
1
0
1
0
1
0
1
Command 1 identification code
HSYNC (pin 22) functions as the horizontal synchronizing
signal input
HSYNC (pin 22) functions as the composite synchronizing
signal input
The system clock has a positive polarity.
The system clock has a negative polarity.
Command 2 identification code
The vertical synchronizing signal input polarity is low active.
The vertical synchronizing signal input polarity is high active.
The horizontal synchronizing signal input polarity is low active.
The horizontal synchronizing signal input polarity is high active.
Data is transferred in 16-bit units.
Continuous transfers with the upper 8 bits input first and then
the lower 8 bits
RV specifies the reverse video display function.
RV specifies system 3 output control.
MOD1
0
0
1
1
MOD0
0
1
0
1
Register content
Register content
LC oscillator mode
Clock input (1 dot)
Clock input (NTSC)
Clock input (PAL)
LC74772V
Function
Function
Operation
Sets the pin 21 (VSYNC) signal input
polarity.
Sets the pin 22 (HSYNC) signal input
polarity.
Sets the COMMAND 14 data transfer
format.
COMMAND-14 Data 11: Valid in RV
RGB output mode.
The VSYNC pin (pin 21) must be tied to
ground or V
synchronizing signal input mode.
This sets the clock polarity for system
operation when pin 2 is used as a clock
input.
Valid when the CTRL1 pin (pin 4) is high.
The input clock frequency in clock input
mode is either 4fsc or the dot clock
frequency.
DD
in composite
Note
Note
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